a) Finish the following truth table of a 2-to-4 binary decoder with active-high output, whose logic symbol is shown below. Assume that 'x1' is the most significant bit in the input and 'x0' is the least significant bit in the input. x1 z0 2-to-4 z1 x0 decoder z2 z3 x1 x0 zo zl z2 z3 b) Use the 2-to-4 decoder above to implement the logic function F(x1,x0) = (x1+ x0)(x1+x0). You may use an additional logic gate.
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- d) Draw the schematics of 4-bit synchronous and asynchronous MOD-8 counters and comment on their pros and cons. e) Calculate the noise margin for a logic gate with the following logic levels: VIL = 1.1 V, VIH = 3.2 V, VOL = 0.6 V, VOH = 4.0 V.parity generator design, construct and test a circuit that generates an even parity bit ffrom four messages bits . use XOR gates. adding one more XOR gate, expand the circuit so that it generates an odd parity bit also.Assume that the exclusive-OR gate has a contamination delay of 10 ns and that the AND or OR gates have a contamination delay of 5 ns. What is the total contamination delay time in the 8-bit adder? Note: your answer should include only the value of the delay without the unit (only the number) A B- Cin- Cout Answer:
- How to build this circuit? (on Digital or Logisim) Binary-coded decimal is an alternative method of representing integers using binary. In it, each base-10 digit is represented by four bits, thus each nibble takes one of 10 values (0000 through 1001). Therefore, using BCD, 42 (decimal) is represented as 0100 0010 (binary) and 196 (decimal) is represented as 0001 1001 0110 (binary). Create a circuit in Logisim that accepts as input a pair of two-digit integers represented as BCD and outputs their sum in BCD. Any and all Digital components are fair game. You can assume that all inputs will be valid BCD-encoded numbers.Q4: For each of the following set of binary numbers, determine the logic states at each point in the logic symbol of 7485 4-bit comparator. a) P3 P2 P1 PO=1100 Q3 Q2 Q1 Q0=1010 b) P3 P2 P1 P0=1001 Q3 Q2 Q1 Q0=1101Logic Gates:* 7404LS (NOT)* 7408LS (AND)* 7432LS (OR)* 7400LS (NAND)* 7402LS (NOR)* 7486LS (EX-OR)Or you can use 74HCxx versions. Task 2: 4 INPUT PRIORITY ENCODERa) Write the truth table.b) Find the outputs in terms of min terms using minimal expression.c) By using K map, find the simple/simplest expression of theoutputs.d) Draw the circuit diagram. (Simulation design will be accepted.)e) Simulate the circuit & explain your results. (Please do notdesign separate simulations for each output. You should design ONEsimulation including all inputs and outputs.)
- 2- A certain application requires that a four-bit binary number be decoder use 74154 decoders to implement the logic.The binary number is represented as A,B,C and D?Question 3: a) Design a circuit which will add a 4-bit binary number to a 5-bit binary number. Use five full adders. Assume negative numbers are represented in 2's complement. (Hint: How do you make a 4-bit binary number into a 5-bit binary number, without making a negative number positive or a positive number negative?) b) A half adder is a circuit that adds two bits to give a sum and a carry. Give the truth table for a half adder, and design the circuit using only two gates. Then design a circuit which will find the 2's complement of a 4-bit binary number. Use four half adders and any additional gates. (Hint: Recall that one way to find the 2's complement of a binary number is to complement all bits, and then add 1.)Question 3 a) Convert the following unsigned binary numbers to decimal. i) 101101112 ii) 010011012 iii) 100101102 b) Assume a digital to analog conversion system uses a 10-bit integer to represent an analog temperature over a range of -100C to 1000C. If the actual temperature being read was 36.5oC, what would be the closest possible value that the system could represent? Expiain the term aliasing and discuss how it can be avoided in digital sampling. d) Show the output waveform of an AND gate with the inputs A, B, and C indicated in the figure below. A B C
- 2- A certain application requires that a four-bit binary number be decoder use 74154 decoders to implement the logic. The binary number is represented as A,B,C and D?5) below is the accuracy table showing the output values for two separate binary number entries (W and Y) with a length of two bits. Get the simplest form of output functions with the Karnaugh diagram. Draw a logic diagram of the circuit that performs the function of these functions.Describe in detail which functions a, b and C perform for 2-bit binary numbers in the input.- What is meant by 4 to 16-line decoder? Draw the block diagram of that decoder (Please don't show the logic circuit) that has active HIGH inputs and active LOw outputs. - Draw the decoding logic circuit that will detect following binary codes. Given that an active HIGH output is required. (i) 1101 (ii) 110010 - You wish to detect only the presence of the codes 1110, 1101, 0111 and 1111. An active HIGH output is required to indicate their presence. Develop the minimum decoding logic with a single output that will indicate when any one of these codes is on the inputs. For any other codes output must be LOW. -For the decimal to BCD encoder logic of the following circuit, assume that the inputs 5, 7 and 9 are HIGH. What is the output code? Is it a valid BCD code? A, 4567