12_Y86

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University of Massachusetts, Lowell *

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2030

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Computer Science

Date

Jan 9, 2024

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docx

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3

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COMP.2030 LAB 12/6/23 NAME _Wendy Carvalho__________________________________________ 1. Each byte sequence below indicates address: Y86 encoding For each byte sequence below, determine the Y86 instruction sequence it encodes. 0x100: 30 f3 fcff ffff ffff ffff 4063 00 0800 0000 0000 0000 irmovq $-4, %rbx rmmovq %rsi, 0x800(%rbx) 0x200: 50 54 0700 0000 0000 0000 b0 1f mrmovq rbp, 0x7(rsp) popq rcx 0x300: 61 13 73 000200000000000000 subq rcx, rbx je 0x200 0x400: 6362a00f xorq %rsi, %rdx pushrq rax 2. A Y86 machine is a subset of x86 with the instruction set shown above right. Write the byte encoding of the following Y86 instruction sequence, starting at address 0x100. irmovq $15, %rbx
rrmovq %rbx, %rcx loop: rmmovq %rcx, -3(%rbx) addq %rbx, %rcx jmp loop 0x100 30F3 0000 0000 0000 0000 000F 0x200 4031 0000 0000 0000 0000 0000 0x300 4013 f3ffffffffffffffffff 0x400 6031 0000 0000 0000 0000 0000 0x500 70 0001 0000 0000 0000 0000 3. Suppose that the 1-bit ALU in Y86 is constructed as on the right, except that OR gate is replaced by an XOR gate so that it can perform add, sub, and and xor operations. Also shown are three control signals: Ainvert, Binvert, and Operation. The 2-bit Operation controls the multiplexer to select the appropriate input to the output of the ALU. The two bits are determined by the Y86 instruction iCode of 6 for OP instructions and iFun code. A separate combinational logic circuit takes two bits (ifun 1 and ifun 0 ) for four OP instructions (0, 1, 2, and 3 for add, sub, and, and xor), and generates appropriate values for Operation. Write the truth table for the combinational logic with inputs of ifun 1 and ifun 0 and the output tied to Operation. ifun 1 ifun 0 Operation ----------------------------------- 0 0 add 0 1 xor 1 0 and 1 1 sub
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