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Last Updated: 2023-10-28 12:46 1 EECS 16A Designing Information Devices and Systems I Fall 2023 Homework 9 This homework is due November 3, 2023, at 23:00 Self-grades are due November 6, 2023, at 23:00. Submission Format Your homework submission should consist of one fi le. • hw9.pdf : A single PDF fi le that contains all of your answers (any handwritten answers should be scanned). Submit the fi le to the appropriate assignment on Gradescope. 1. Reading Assignment For this homework, please read Notes 16 and 17. Note 16 will provide an introduction to capacitors (a cir- cuit element which stores charge), capacitive equivalence, and the underlying physics behind them. Sections 17.1 - 17.2 in Note 17 will provide an overview of the capacitive touchscreen and how to measure capac- itance. 17.3 will introduce you to the op-amp and how it can be used as a comparator. 17.4 will discuss implementing a capacitive touchscreen with an op-amp comparator. (a) Describe the key ideas behind how a capacitor works. How are capacitor equivalences calculated? Contrast this with how we calculate resistor equivalences. (b) Consider the capacitive touchscreen. Describe how it works, and compare and contrast it to the resistive touchscreens we have seen in previous lectures and homeworks. 2. Equivalent Capacitance (a) Find the equivalent capacitance between terminals a and b of the following circuit in terms of the given capacitors C 1 , C 2 , and C 3 . Leave your answer in terms of the addition, subtraction, multiplication, and division operators only . a C 1 b C 2 C 3 (b) Find and draw a capacitive circuit using three capacitors, C 1 , C 2 , and C 3 , that has equivalent capacitance of C 1 ( C 2 + C 3 ) C 1 + C 2 + C 3 UCB EECS 16A, Fall 2023, Homework 9, All Rights Reserved. This may not be publicly shared without explicit permission. 1

Last Updated: 2023-10-28 12:46 2 3. Dynamic Random Access Memory (DRAM) Nearly all devices that include some form of computational capability (phones, tablets, gaming consoles, laptops, ...) use a type of memory known as Dynamic Random Access Memory (DRAM). DRAM is where the “working set” of instructions and data for a processor is typically stored, and the ability to pack an ever increasing number of bits on to a DRAM chip at low cost has been critical to the continued growth in computational capability of our systems. For example, a single DRAM chip today can store > 8 billion bits and is sold for ≈ $3-$5. At the most basic level and as shown below, every bit of information that DRAM can store is associated with a capacitor. The amount of charge stored on that capacitor (and correspondingly, the voltage across the capacitor) determines whether a “1” or a “0” is stored in that location. C bit + − V bit Access Switch Single DRAM Bit Cell In any real capacitor, there is always a path for charge to “leak” off the capacitor and cause it to eventually discharge. In DRAMs, the dominant path for this leakage to happen is through the access switch, which we will model as a leakage to ground . The fi gure below shows a model of this leakage : C bit I leak Fun Fact: This leakage is actually responsible for the “D” in “DRAM” – the memory is “dynamic” because after a cell is “written” by storing some charge onto its capacitor, if you leave the cell alone for too long, the value you wrote in will disappear because the charge on the capacitor leaked away. Let’s now try to use some representative numbers to compute how long a DRAM cell can hold its value before the information leaks away. Let C bit = 28fF (note that 1fF = 1 × 10 − 15 F) and the capacitor be initially charged to 1 . 2V to store a “1.” V bit must be > 0 . 9V in order for the circuits outside of the column to properly read the bit stored in the cell as a “1.” What is the maximum value of I leak that would allow the DRAM cell retain its value for > 1ms ? Hint: Start by writing out the equations you know about charge and current related to the capacitor. Note here that the current source is discharging the capacitor. 4. It’s fi nally raining! UCB EECS 16A, Fall 2023, Homework 9, All Rights Reserved. This may not be publicly shared without explicit permission. 2

Last Updated: 2023-10-28 12:46 3 A lettuce farmer in Salinas Valley has grown tired of weather.com’s imprecise rain measurements. Therefore, they decided to take matters into their own hands by building a rain sensor. They placed a rectangular tank outside and attached two metal plates to two opposite sides in an effort to make a capacitor whose capacitance varies with the amount of water inside. a C air b C H 2 O h H 2 O w h tot The width and length of the tank are both w (i.e., the base is square) and the height of the tank is h tot . (a) What is the capacitance between terminals a and b when the tank is full? What about when it is empty? Note: the permittivity of air is ε , and the permittivity of rainwater is 81 ε . (b) Suppose the height of the water in the tank is h H 2 O . Modeling the tank as a pair of capacitors in parallel, fi nd the total capacitance between the two plates. Call this capacitance C tank . (c) After building this capacitor, the farmer consults the internet to assist them with a capacitance-measuring circuit. A fellow internet user recommends the following: I s C tank I c + − V C ( t ) , V C ( 0 ) = 0V In this circuit, C tank is the total tank capacitance that you calculated earlier. I s is a known current supplied by a current source. The suggestion is to measure V C for a brief interval of time, and then use the difference to determine C tank . Determine V C ( t ) , where t is the number of seconds elapsed since the start of the measurement. You should assume that before any measurements are taken, the voltage across C tank , i.e. V C , is initialized to 0V, i.e. V C ( 0 ) = 0. (d) Using the equation you derived for V C ( t ) , describe how you can use this circuit to determine C tank and h H 2 O . (e) However, after spending some time thinking about different ways of measuring this capacitance you came up with a better idea. You decided to use the circuit proposed in part (c) along with a comparator, as show in the fi gure below. What you are basically interested in, is the time T 1 needed for V c to UCB EECS 16A, Fall 2023, Homework 9, All Rights Reserved. This may not be publicly shared without explicit permission. 3

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Last Updated: 2023-10-28 12:46 4 reach V re f . In order to measure time you use a timer. When voltage V c becomes larger than V re f , the comparator ﬂ ips its value and you stop the timer. How would you measure in that case the value of the capacitance? 5. Capacitive Touchscreen (Contributors: Deepshika Dhanasekar, Panos Zarkos, Richard Liou, Wahid Rahman, Urmita Sikder) The model for a capacitive touchscreen can be seen in Figure 1. See Table 1 for values of the dimensions. The green area represents the contact area of the fi nger with the top insulator. It has dimensions w 2 x d 1 , where w 2 is the horizontal width of the fi nger contact area and d 1 is the depth (into the page) of the fi nger contact area. The top metal (red area) has dimensions w 1 × d 1 . The bottom metal (grey area) has dimensions w × d 2 , where w is larger than both w 1 and w 2 . Table 1: Touchscreen Dimension Values d 1 10 mm d 2 1 mm t 1 2 mm t 2 4 mm w 1 1 mm w 2 2 mm (a) Draw the equivalent circuit of the touchscreen that contains the nodes F , E 1 , and E 2 when: (i) there no fi nger present; and (ii) when there is a fi nger present. Express the capacitance values in terms of C 0 , C F − E 1 , and C F − E 2 . Hint: Note that node F represents the fi nger. When there is no touch node F would be non-existent. Hint: Treat E 1 as the "top node", E 2 as the "bottom node", and the fi nger F as an intermediate node when present. (b) What are the values of C 0 , C E 1 − F , and C F − E 2 ? Assume that the insulating material has a permittivity of ε = 4 . 43 × 10 − 11 F / m and that the thickness of the metal layers is small compared to t 1 (so you can ignore the thickness of the metal layers). (c) What is the difference in effective capacitance between the two metal plates (nodes E 1 and E 2 ) when a fi nger is present? UCB EECS 16A, Fall 2023, Homework 9, All Rights Reserved. This may not be publicly shared without explicit permission. 4

Last Updated: 2023-10-28 12:46 5 Top view Side view Side view d 2 d 1 t 1 w 1 Figure 1: Model of capacitive touchscreen. 6. Super-Capacitors In order to enable small devices for the “Internet of Things” (IoT), many companies and researchers are cur- rently exploring alternative means of storing and delivering electrical power to the electronics within these devices. One example of these are “super-capacitors” - the devices generally behave just like a “normal” capacitor but have been engineered to have extremely high values of capacitance relative to other devices that fi t in to the same physical volume. They can function as a power supply for low power applications such as IoT devices and have the advantage that they can be charged and discharged many times without losing maximum charge capacity. That property makes super-capacitors suitable to store energy from intermittent power sources such as those from energy harvesting. Suppose you are tasked with designing a power supply with a super-capacitor in an IoT device. (a) Assuming that your electronic device (load) can be modeled as a constant current source with a value of i load , draw circuit models for your device using super-capacitors as the power supply with the following con fi gurations: • Con fi g 1: a single super-capacitor as the power supply • Con fi g 2: two super-capacitors stacked in series as the power supply • Con fi g 3: two super-capacitors connected in parallel as the power supply (b) If each super-capacitor is charged to an initial voltage v init and has a capacitance of C sc , for each of the three con fi gurations above, write an expression for the voltage supplied to your electronic device as a function of time after the device has been activated (i.e. connected to the super-capacitor(s)). UCB EECS 16A, Fall 2023, Homework 9, All Rights Reserved. This may not be publicly shared without explicit permission. 5

Last Updated: 2023-10-28 12:46 6 (c) Now let’s assume that your electronic device requires some minimum voltage v min in order to function properly. For each of the three super-capacitor con fi gurations, write an expression for the lifetime of the device. (d) Assume that a single super-capacitor doesn’t provide you suf fi cient lifetime and so you have to spend the extra money (and device volume) for another super-capacitor. You consider the two following con fi gurations: • Con fi g 2: two super-capacitors stacked in series • Con fi g 3: two super-capacitors connected in parallel When is Con fi g 3 (parallel) better than Con fi g 2 (series)? Your answer should involve conditions on v init and v min . (e) Calculate the amount of energy delivered by the super-capacitors in Con fi g 3 (parallel) over the de- vice’s lifetime. 7. Homework Process and Study Group Who did you work with on this homework? List names and student ID’s. (In case you met people at home- work party or in of fi ce hours, you can also just describe the group.) How did you work on this homework? If you worked in your study group, explain what role each student played for the meetings this week. UCB EECS 16A, Fall 2023, Homework 9, All Rights Reserved. This may not be publicly shared without explicit permission. 6

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Q bit = V bit ∗ C bit Write down equations that are known: I leak = (1 . 2 V − 0 . 9 V ) ∗ 28 fF/ 1 ∗ 10 − 3 S I leak = dV bit /dt ∗ C bit Differentiate with respect to time: Plug in Values: Final Answer: 8 . 4 pA C empty = ε air h tot w w = ε h tot C full = ε H 20 h tot w w = 81 ε h tot C air = ε air ( h tot − h H 2 O ) w w = ε ( h tot − h H 2 O ) C tank = C water + C air = ε ( h tot + 80 h H 2 O ) I C = C tank dV C dt , I C = I s dV C dt = I s C tank V C ( t ) = I s C tank t It consists of two conductive plates separated by an insulating material called a dielectric. When a voltage is applied across the plates, positive charge accumulates on one plate, and negative charge accumulates on the other plate, creating an electric field between them. The capacitance (C) of a capacitor measures its ability to store charge per unit voltage. It is calculated using the formula: C=Q/V, where Q is the charge stored on the plates and V is the voltage across the capacitor. Series Capacitors: When capacitors are connected in series, their total capacitance (C _ total) is calculated using the formula Parallel Capacitors: When capacitors are connected in parallel, their total capacitance is the sum of the individual capacitances:

C 0 = ε d 2 w 1 t 1 = 2 . 215 ∗ 10 − 14 F C F − E 1 = ε d 1 w 1 t 2 − t 1 = 2 . 215 ∗ 10 − 13 F C F − E 2 = ε d 2 ( w 2 − v 1 ) t 2 = 1 . 108 ∗ 10 − 14 F V out ( t ) = V init × e − t R eq C sc (b) Expression for Voltage Supplied to the Electronic Device: Config 1: Single Super-Capacitor Config 2: Two Super-Capacitors in Series V out ( t ) = 2 V init × e − t R eq C sc Config 3: Two Super-Capacitors in Parallel V out ( t ) = V init × e − 2 t R eq C sc (c) Expression for Device Lifetime: For each configuration, the lifetime of the device can be calculated using the time it takes for Vout (t) to decrease to Vmin. − R eq C sc ln ± V sa V sa ² − R e C sc 2 ln ± V sa V sa ² − R eq C sc 2 ln ± V min V int ² Config 3 (parallel) is better than Config 2 (series) when the following condition is met: The total energy delivered by the super-capacitors in Config 3 over the device's lifetime can be calculated using the following formula: