Lab6-Prelab

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Iowa State University *

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Electrical Engineering

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Apr 3, 2024

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Embedded Systems International Lab 6 Prelab Name : Lab Partner Name (if you worked together and are submitting the same document or mostly the same answers): Lab Section : Submit your prelab document as a PDF file in Canvas under the corresponding prelab assignment. Every student submits their own prelab. Lab partners are allowed to work on the prelab together and submit the same document (if there is actual collaboration on the document). For full credit, the prelab must be submitted prior to the start of lab. Text responses should be typed or printed neatly. You can draw a sketch by hand, or you can use a drawing tool. Try to have started a rough draft of the prelab when you come to class on Tuesday. Questions 1-7 were included in the Lab 5 Prelab. You selected 4 questions to be graded. The other 3 questions will be graded for this prelab. Circle the questions selected for Prelab 5 and Prelab 6. If none are circled, questions 5-7 will be graded. The same questions cannot be circled for both prelabs 5 and 6. Help your TA by circling the questions properly. 4 questions selected and graded for Prelab 5 : 1 2 3 4 5 6 7 3 questions selected and graded for Prelab 6 : 1 2 3 4 5 6 7 In addition, answer the remaining questions, 8 - 10, in this prelab. 1. Port pins for UART1 transmit (TX) and receive (RX) UART1 is an alternate function, or peripheral, that uses GPIO Port B pins. a) Which Port B pin is used for the UART1 transmit (TX) signal? CPRE 288, ELECTRICAL AND COMPUTER ENGINEERING DEPARTMENT , IOWA STATE UNIVERSITY 1
PB1 b) Which Port B pin is used for the UART1 receive (RX) signal? PB0 2. Use the GPIO port worksheet below to indicate which Port B pin is used for UART1 TX and which Port B pin is used for UART1 RX: write TX and RX in the DATA row of the worksheet under the corresponding pin numbers. What values must be initialized in the other GPIO port registers to configure the UART1 alternate function for the port. Put an “x” in cells that you are not using and should preserve their values. GPIO Port Registers Bit >>> vvv Register 7 6 5 4 3 2 1 0 Description DATA (or PORT pins for alternate functions) X X X X X X U1TX U1RX 0, 1: bit values (or alternate functions) DEN 0 0 0 0 0 0 1 0 1: enable digital AFSEL 0 0 0 0 0 0 1 1 1: enable alternate function PCTL field field field field field field field field Each column in this row is a 4-bit field in the 32-bit PCTL register Refer as needed to the examples on pages 19-28 of the mtg10-notes-concepts-GPIOaltfunc-UART.pdf file and Bai book Table 8.1 (in the notes and slides) (see also Tiva datasheet section 23.4 GPIO Pins and Alternate Functions, Table 23-5, for PMCx Bit Field Encoding). 2
3. Refer to the GPIOAFSEL register description in the Tiva datasheet (Register 10). Refer to the macro definition for the GPIO Port B AFSEL register in the header file, tm4c123gh6pm.h. a. Write the full #define macro definition for the PORTB_AFSEL register as given in the header file. #define GPIO_PORTB_AFSEL_R (*((volatile unsigned long *)0x40005420)) GPIO_PORTB_AFSEL_R |= (0x3); b. What is the 32-bit memory address of this AFSEL register (in hex)? 0x40005420 c. Explain how to determine the register address, i.e., your answer to part b (the memory address for the Port B AFSEL register), from the Tiva datasheet register description (pages 671-672). Hint: Pay attention to the following information from the datasheet pages. Recall that we are using the APB bus on the microcontroller. On the datasheet, it has the base hex value for GPIOAFSEL: 0x4005.9000, and also it says it is offset by 0x420. So, by adding the offset, we get 0x40005420 3
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