Computer Engineering : A New Class Of Power Conscious Cad Tools Essay

I am Prathyusha Velthuri bearing Id 700629725.This is my Second Report on my Internship in CS (5020).

Norton (Ed.). (2006). Computing Fundamentals. [University of Phoenix Custom Edition e-Text]. New York, New York: McGraw-Hill. Retrieved January 21, 2011, from CIS105 - Computers-Inside and Out.

1Research Scholar, 2Associate Professor, Department of Computer Science, AIM & ACT, Banasthali University, Banasthali-304022, email: jangid.divya@gmail.com

Stair, R. & Reynolds, G. (2006). Fundamentals of Information Systems, Third ed. Chapter 1, pg. 35. Thomson Course Technology.

The total power consumption is very much lower , but there will be substantial leakage power. At low level logic activity, the active power is low, the leakage power dominates, reducing the NTV effectiveness for energy efficiency. Thus, in combination with sleep transistors or power gating chips, fine grain power leakage management will be much more important.

It was the time to water the seeds of VLSI that were sown earlier. In 2010, I completed my schooling from Ahlcon International School, Delhi. This marked the culmination of a 12-year period of brilliant schooling and I must admit that much of what I have gone on to do and achieve is the result of those years. In August 2011, I enrolled for a 4-year Bachelor’s Program at Jaypee Institute of Information Technology, Noida and opted for Electronics and Communication as my Major. I have spent the past few years in an atmosphere of proactive and vibrant academics. Amidst students drawn from every corner of India and a faculty of highly qualified and widely travelled mentors, I have flowered. I remember my teacher, Professor Satyendra Kumar, walk into the first class of Basic Electronic Devices and Circuits and write on the board “The Next Big Thing Is Really Small.” And I knew I was in the right

My interest towards mathematics made me to take Mathematics, Physics and Chemistry as the main subjects during my intermediate (10+2). After obtaining 94% marks in Intermediate and securing a top 6% rank in engineering entrance test, I opted for Computer Science Engineering in JNTU College of Engineering. Immediately after my Bachelor’s degree, I secured the job in Wipro Technologies and this offered me numerous opportunities to learn about the technical aspects of Software industry.

R.Vikram, Asst. Professor in CSE, GNITC, Hyderabad, A.P., India, captureratan@gmail.com K.Vikram, Asst. Professor in CSE, GNITC, Hyderabad, A.P., India, vikramkalvala84@gmail.com Patil ManikRao, Asst. Professor in CSE, GNITC, Hyderabad, A.P., India, manikvpatil@gmail.com

M. Tech Scholar, Al-Falah School of Engg and Tech., Dhauj, Faridabad-121004, Haryana, India M. Tech Scholar, Al-Falah School of Engg and Tech., Dhauj, Faridabad-121004, Haryana, India 3 Senior Lecturer (Computer Science and Engg), Al-Falah School of Engg and Tech., Dhauj, Faridabad-121004, Haryana, India

During my college career, through various challenging courses and research experience, as a computer engineering major, I not only obtained a solid background knowledge in this field but developed an analytical mind for research and a passion to continuing working in computer architecture. After deliberating on my future, I decided to apply for the Ph.D. program at (department of Computer Science & Engineering) at (the Pennsylvania State University).

In the past, density and frequency were low enough and never acted like a constraint on the chip. But as the scale of integration improved, the number of transistors being packed onto a chip has increased. This lead to the increase of the operating frequency and processing capacity of the chip and thus resulting in power dissipation. As a result, power efficiency is considered as a design goal along with performance. Despite this acceptance, low power design methodologies are adopted at a slow pace because of the effort that must be into at the abstraction level and at each phase of the design.

1234 BE IT, Department of Information Technology, RMD Sinhgad School of Engineering, Pune, Maharashtra, India.

In earlier stages of VLSI circuit design the emphasis is on Area and Speed optimization giving concerns to Packaging and Efficient designing. As the technology scales down according to predictions of Moor’s Law, it is advent that the CMOS dimensions have been scaled down drastically. But due to increase in use of Portable Devices Such as Cellphones, Laptops, Personal Health Monitoring systems, there has been a demand of higher battery life for Portable devices. Whereas big data centers which contains large set of circuits consumes tremendous power and dissipates large amount of heat which incurs huge cost to maintain. The solution for these problems is to design circuits which consume low power which give rise to the concept of Low-Power VLSI designing.

Special thanks to our families whose courage and support for us to follow the computer science department and the lecturers in computer science department. Thanks to our supervisor Dr. Nazar saaid for his support through the graduation project.

1, 2,3,4,5 Department of Information Technology, Sinhgad Academy of Engineering, Savitribai Phule Pune University, India