Silicon Planar Technology And Technology

2110 WordsOct 9, 20169 Pages
Introduction Silicon planar technology is a primary process used to build the integrated circuits. This technology is used to make circuits on wafer substrates using step by step and layer upon layer [1]. Semiconductor industries employ this method to make several chips on the same wafer simultaneously. In the last decade, microfluidic and nanofluidic devices fabrication community has also benefitted from this technology. For anyone seeking to use this technology, it is of paramount importance to learn the techniques involved in this fabrication process. The ECE 5037 lab serves this purpose by employing the planar technology to fabricate a set of semiconductor devices, namely, five metal-oxide semiconductor field-effect transistors (MOSFETs), one PN diode, a diffused resistor, a MOS capacitor, other test structures including a van der Pauw structure and a TLM structure, and two inverters. The fabrication of these structures in the lab spans over most of the primary techniques used to make semiconductor devices and thus helps the user to familiarize with the planar process. Testing of the device will be carried out in the second half of the laboratory schedule, which will help the user understand the basics of semiconductor device testing. Since all the fabrication steps are not complete yet, this report only partially covers the device description and results obtained. In the device description, basic wafer properties like
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