Wearable Medical Devices Using Delta Sigma Processing Circuits

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3.3 Research Objective 3: Wearable Medical Devices using Delta-Sigma Processing Circuits The goal of this research objective is to apply the proposed Delta-Sigma DSP circuits to wearable medical sensors, more specifically to an EEG signal processor. Examples of questions that we wish to address are: How much power can be saved by using Delta-Sigma circuits instead of conventional DSP circuits? What is the trade-off between processing accuracy and power consumption? How can an efficient interface be designed between Delta-Sigma Processing circuits and peripheral devices? 3.3.1 Background and Rationale Wearable EEG signal processors are imminently expected by researchers, clinical doctors and patients [127–131]. One of the main…show more content…
It would also allow the patients to wear the device outside the laboratory, creating more opportunities to capture elusive phenomena [134]. This would require a low-power device implementing a hardware efficient EEG processing algorithm. The Cross frequency coupling (CFC) algorithm is one of the most promising EEG signal processing methods [135–137]. CFC, which highlights the correlation between the high-frequency amplitude and the low-frequency phase of EEG signals, is an attractive means of studying cognitive brain tasks [138] and disorders such as epilepsy [136] and schizophrenia [137]. Several metrics have been developed to measure this coupling, including the modulation index [136] and the phase-locking value (PLV) [135]. However, like other EEG processing algorithms, CFC involves a large number of MAC operations. If it is implemented in an ASIC using conventional circuits, it consumes too much circuit area and power, increasing the cost of the device and reducing its battery lifetime. Based on our preliminary results, we propose to use Delta-Sigma based linear processing circuits for CFC-based EEG processors. The proposed project could dramatically reduce circuit area and power and create a wearable CFC EEG processor. Figure 10: System block diagram for calculating CFC modulation index. 3.3.2 Preliminary Research and Result Insights An integrated CFC EEG processor was developed in our lab [97,98]. The CFC EEG processor
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