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Bartleby Sitemap - Textbook Solutions

All Textbook Solutions for Systems Architecture

1VE 2VE 3VE 4VE 5VE 6VE 7VE 1RQ 2RQ 3RQ 4RQ 5RQ 6RQ 1RP 2RP 1VE A(n) __________ is a storage location implemented in the CPU.3VE A problem-solving procedure that requires executing one or more comparison and branch instructions is called a(n) __________. 5VE 6VE 7VE 8VE The major components of a CPU are the __________, __________, and __________. A set of instructions thats executed to solve a specific problem is called a(n) __________.11VE 12VE 13VE A CPU is a(n) __________ processor capable of performing many different tasks simply by changing the program. 15VE The CPU __________ program instructions one at a time.Most programs are written in a(n) __________, such as FORTRAN or Java, which is then translated into equivalent CPU instructions.18VE 19VE 20VE 21VE 22VE 23VE 1RQ What shortcomings of mechanical computation did the introduction of electronic computing devices address? 3RQ What is a CPU? What are its primary components? What are registers? What are their functions? 6RQ 7RQ 8RQ How does a supercomputer differ from a mainframe computer? 10RQ 11RQ 12RQ How can a computer system be tuned to a particular application?What characteristics differentiate application software from system software? In what ways do system software make developing application software easier? Why has the development of system software paralleled the development of computer hardware? 17RQ Tables 2.2 and 2.3 will probably be out of date by the time this book is published. Research current computer hardware offerings and update Tables 2.2 and 2.3 with current representative models for each computer class/type. 1VE 2VE A(n) __________ is an integer stored in double the normal number of bit positions. 4VE Assembly (machine) language programs for most computers use __________ notation to represent memory address values.6VE 7VE 8VE 9VE A(n) __________ is an array of characters.Most Intel CPUs use the __________, in which each memory address is represented by two integers.12VE A(n) __________ contains 8 __________.14VE The result of adding, subtracting, or multiplying two integers might result in overflow but never __________ or __________.16VE 17VE 18VE 19VE 20VE 21VE 22VE ___________ occurs when the result of an arithmetic operation exceeds the number of bits available to store it.In a CPU, _______ arithmetic generally is easier to implement than _______ arithmetic because of a simpler data coding scheme and data manipulation circuitry.In the ________, memory addresses consist of a single integer. 26VE Data represented in ________ is transmitted accurately between computer equipment from different manufacturers if each computer’s CPU represents real numbers by using an IEEE standard notation. 28VE 29VE A(n) ____________ is one instance or variable of a class. 1RQ Why is binary data representation and signaling the preferred method of computer hardware implementation? 3RQ 4RQ 5RQ 6RQ 7RQ Why doesnt a CPU evaluate the expression 'A' = 'a' as true?9RQ What primitive data types can normally be represented and processed by a CPU?11RQ How is an array stored in main memory? How is a linked list stored in main memory? What are their comparative advantages and disadvantages? Give examples of data that would be best stored as an array and as a linked list.14RQ 1PE 2PE 4PE 5PE 6PE 1RP 2RP 3RP 1VE ________________ generates heat in electrical devices. 3VE 4VE 5VE One _________________ is one cycle per second. 7VE When an instruction is first fetched from memory, its placed in the _________________ and then ________________to extract its components.9VE 10VE 11VE 12VE The contents of a memory location are copied to a register while performing a(n) __________________ operation. 14VE A(n) ________________ instruction always alters the instruction execution sequence. A(n) ______________ instruction alters the instruction execution sequence only if a specified Condition is true. 16VE A(n) ____________________ instruction copies data from one memory location to another. The CPU incurs one or more _________________ when it’s idle, pending the completion of an operation by another device in the computer system. The CPU incurs one or more _____ when its idle, pending the completion of an operation by another device in the computer system.In many CPUs, a register called the _____ stores bit flags representing CPU and program status, including those representing processing errors and the results of comparison operations. The components of an instruction are its _____ and one or more _____. Two 1-bit values generate a 1 result value when a(n) _____ instruction is executed. All other input pairs generate a 0 result value.A(n) _____ operation transforms a 0 bit value to 1 and a 1 bit value to 0._____ predicts that transistor density will double every two years or less. A(n) _____ is a measure of CPU or computer system performance when per-forming specific tasks. _____ is a CPU design technique in which instruction execution is divided into multiple stages and different instructions can execute in different stages simultaneously.Describe the operation of a MOVE instruction. Why is the name MOVE a misnomer?2RQ 3RQ 4RQ 5RQ 7RQ 8RQ 9RQ How does pipelining improve CPU efficiency? What’s the potential effect on pipelining’s efficiency when executing a conditional BRANCH instruction? What techniques can be used to make pipelining more efficient when executing conditional BRANCH instructions? 11RQ Develop a program consisting of primitive CPU instructions to implement the following procedure: integer i,a; i = 0; while (i 10) do a = i2; i = i + 1; endwhile If a microprocessor has a cycle time of 0.5 nanoseconds, what’s the processor clock rate? If the fetch cycle is 40% of the processor cycle time, what memory access speed is required to implement load operations with zero wait states and load operations with two wait states? Processor R is a 64-bit RISC processor with a 2 GHz clock rate. The average instruction requires one cycle to complete, assuming zero wait state memory accesses. Processor C is a CISC processor with a 1.8 GHz clock rate. The average simple instruction requires one cycle to complete, assuming zero wait state memory accesses. The average complex instruction requires two cycles to complete, assuming zero wait state memory accesses. Processor R can’t directly implement the complex processing instructions of Processor C. Executing an equivalent set of simple instructions requires an average of three cycles to complete, assuming zero wait state memory accesses. Program S contains nothing but simple instructions. Program C executes 70% simple instructions and 30% complex instructions. Which processor will execute program S more quickly? Which processor will execute program C more quickly? At what percentage of complex instructions will the performance of the two processors be equal? 4PE 1RP 2RP 3RP 1VE 2VE 3VE 4VE 5VE 6VE 7VE 8VE 9VE 10VE 11VE 12VE 13VE 14VE 15VE 16VE 17VE 18VE 19VE 20VE 21VE 1RQ 2RQ 3RQ 4RQ 5RQ 6RQ 7RQ 8RQ 9RQ 10RQ 11RQ 12RQ 13RQ 14RQ 1PE 2PE 3PE 1RP 2RP 3RP 1VE 2VE 3VE 4VE 5VE 6VE 7VE 8VE 9VE 10VE 11VE 12VE 13VE 14VE 15VE 16VE 17VE 18VE 19VE 20VE 21VE 22VE 23VE 24VE 25VE 26VE 27VE 28VE 29VE 30VE 31VE 32VE 33VE 34VE 1RQ 2RQ 3RQ 4RQ 5RQ 6RQ 7RQ 8RQ 9RQ 10RQ 11RQ 12RQ 13RQ 1PE 2PE 3PE 1RP 2RP 3RP 1VE 2VE 3VE 4VE 5VE 6VE 7VE 8VE 9VE 10VE 11VE 12VE 13VE 14VE 15VE 16VE 17VE 18VE 19VE 20VE 21VE 22VE 23VE 24VE 25VE 26VE 27VE 28VE 1RQ 2RQ 3RQ 4RQ 5RQ 6RQ 7RQ 8RQ 9RQ 10RQ 11RQ 12RQ 1RP 2RP 3RP 4RP 1VE 2VE 3VE 4VE 5VE 6VE 7VE 8VE 9VE 10VE 11VE 12VE

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