Processing stages: The processing of an instruction has number of operations. The operations are organized into particular sequence of stages. It attempts to follow a uniform sequence for all instructions. The description of stages are shown below: Fetch: It uses program counter “PC” as memory address to read instruction bytes from memory. The 4-bit portions “icode” and “ifun” of specifier byte is extracted from instruction. It fetches “valC” that denotes an 8-byte constant. It computes “valP” that denotes value of “PC” plus length of fetched instruction. Decode: The register file is been read with two operands. It gives values “valA” and “valB” for operands. It reads registers with instruction fields “rA” and “rB”. Execute: In this stage the ALU either performs required operation or increments and decrements stack pointer. The resulting value is termed as “valE”. The condition codes are evaluated and destination register is updated based on condition. It determines whether branch should be taken or not in a jump instruction. Memory: The data is been written to memory or read from memory in this stage. The value that is read is determined as “valM”. Write back: The results are been written to register file. It can write up to two results. PC update: The program counter “PC” denotes memory address to read bytes of instruction from memory. It is used to set next instruction’s address.

Question

Want to see the full answer?

Answer 1

Question

Chapter 4.4, Problem 4.28PP

A.

Program Plan Intro

Processing stages:

The processing of an instruction has number of operations.

The operations are organized into particular sequence of stages.

It attempts to follow a uniform sequence for all instructions.

The description of stages are shown below:

Fetch:

It uses program counter “PC” as memory address to read instruction bytes from memory.

The 4-bit portions “icode” and “ifun” of specifier byte is extracted from instruction.

It fetches “valC” that denotes an 8-byte constant.

It computes “valP” that denotes value of “PC” plus length of fetched instruction.

Decode:

The register file is been read with two operands.

It gives values “valA” and “valB” for operands.

It reads registers with instruction fields “rA” and “rB”.

Execute:

In this stage the ALU either performs required operation or increments and decrements stack pointer.

The resulting value is termed as “valE”.

The condition codes are evaluated and destination register is updated based on condition.

It determines whether branch should be taken or not in a jump instruction.

Memory:

The data is been written to memory or read from memory in this stage.

The value that is read is determined as “valM”.

Write back:

The results are been written to register file.

It can write up to two results.

PC update:

The program counter “PC” denotes memory address to read bytes of instruction from memory.

It is used to set next instruction’s address.

B.

Program Plan Intro

Processing stages:

The processing of an instruction has number of operations.

The operations are organized into particular sequence of stages.

It attempts to follow a uniform sequence for all instructions.

The description of stages are shown below:

Fetch:

It uses program counter “PC” as memory address to read instruction bytes from memory.

The 4-bit portions “icode” and “ifun” of specifier byte is extracted from instruction.

It fetches “valC” that denotes an 8-byte constant.

It computes “valP” that denotes value of “PC” plus length of fetched instruction.

Decode:

The register file is been read with two operands.

It gives values “valA” and “valB” for operands.

It reads registers with instruction fields “rA” and “rB”.

Execute:

In this stage the ALU either performs required operation or increments and decrements stack pointer.

The resulting value is termed as “valE”.

The condition codes are evaluated and destination register is updated based on condition.

It determines whether branch should be taken or not in a jump instruction.

Memory:

The data is been written to memory or read from memory in this stage.

The value that is read is determined as “valM”.

Write back:

The results are been written to register file.

It can write up to two results.

PC update:

The program counter “PC” denotes memory address to read bytes of instruction from memory.

It is used to set next instruction’s address.

C.

Program Plan Intro

Processing stages:

The processing of an instruction has number of operations.

The operations are organized into particular sequence of stages.

It attempts to follow a uniform sequence for all instructions.

The description of stages are shown below:

Fetch:

It uses program counter “PC” as memory address to read instruction bytes from memory.

The 4-bit portions “icode” and “ifun” of specifier byte is extracted from instruction.

It fetches “valC” that denotes an 8-byte constant.

It computes “valP” that denotes value of “PC” plus length of fetched instruction.

Decode:

The register file is been read with two operands.

It gives values “valA” and “valB” for operands.

It reads registers with instruction fields “rA” and “rB”.

Execute:

In this stage the ALU either performs required operation or increments and decrements stack pointer.

The resulting value is termed as “valE”.

The condition codes are evaluated and destination register is updated based on condition.

It determines whether branch should be taken or not in a jump instruction.

Memory:

The data is been written to memory or read from memory in this stage.

The value that is read is determined as “valM”.

Write back:

The results are been written to register file.

It can write up to two results.

PC update:

The program counter “PC” denotes memory address to read bytes of instruction from memory.

It is used to set next instruction’s address.

D.

Program Plan Intro

Processing stages:

The processing of an instruction has number of operations.

The operations are organized into particular sequence of stages.

It attempts to follow a uniform sequence for all instructions.

The description of stages are shown below:

Fetch:

It uses program counter “PC” as memory address to read instruction bytes from memory.

The 4-bit portions “icode” and “ifun” of specifier byte is extracted from instruction.

It fetches “valC” that denotes an 8-byte constant.

It computes “valP” that denotes value of “PC” plus length of fetched instruction.

Decode:

The register file is been read with two operands.

It gives values “valA” and “valB” for operands.

It reads registers with instruction fields “rA” and “rB”.

Execute:

In this stage the ALU either performs required operation or increments and decrements stack pointer.

The resulting value is termed as “valE”.

The condition codes are evaluated and destination register is updated based on condition.

It determines whether branch should be taken or not in a jump instruction.

Memory:

The data is been written to memory or read from memory in this stage.

The value that is read is determined as “valM”.

Write back:

The results are been written to register file.

It can write up to two results.

PC update:

The program counter “PC” denotes memory address to read bytes of instruction from memory.

It is used to set next instruction’s address.

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4.1.1 Complete solution and answer only no need explanation Given three data points (1,6), (3,28), and (10, 231), What is the value of y at x = 2 if the function y = 2x2 + 3x + 1 passes through the three data points.

1. We wish to compare the performance of two different machines: M1 and M2. The following measurements have been made on these machines: Program Time on M1 Time on M2 1 10 seconds 5 seconds 2 3 seconds 4 seconds Which machine is faster for each program, and by how much? 2. For M1 and M2 of problem 1, the following additional measurements are made:. Find the instruction execution rate (instructions per second) for each machine when running program 1. Program Instructions executed on M1 Instructions executed on M2 1 200 x 106 160 x 106 3. For M1 and M2 of problem 1, if the clock rates are 200 MHz and 300 MHz, respectively, find the CPI for program 1 on both machines using the data provided in problems 1 and 2. 4. You are going to enhance a machine, and there are two possible improvements: either make multiply instructions run four times faster than before or make memory access instructions run two times faster than before. You…

A program has the following breakdown: 25% ld (50% of them directly followed by a dependent instruction),25% sd, 30% r_type, 20% beq (80% of them are taken. Branches are calculated in the third cycle. What is the average CPI of the program when run on the pipelined RISC V implementation in the textbook?

Answer 2

Question

Chapter 4.4, Problem 4.28PP

A.

Program Plan Intro

Processing stages:

The processing of an instruction has number of operations.

The operations are organized into particular sequence of stages.

It attempts to follow a uniform sequence for all instructions.

The description of stages are shown below:

Fetch:

It uses program counter “PC” as memory address to read instruction bytes from memory.

The 4-bit portions “icode” and “ifun” of specifier byte is extracted from instruction.

It fetches “valC” that denotes an 8-byte constant.

It computes “valP” that denotes value of “PC” plus length of fetched instruction.

Decode:

The register file is been read with two operands.

It gives values “valA” and “valB” for operands.

It reads registers with instruction fields “rA” and “rB”.

Execute:

In this stage the ALU either performs required operation or increments and decrements stack pointer.

The resulting value is termed as “valE”.

The condition codes are evaluated and destination register is updated based on condition.

It determines whether branch should be taken or not in a jump instruction.

Memory:

The data is been written to memory or read from memory in this stage.

The value that is read is determined as “valM”.

Write back:

The results are been written to register file.

It can write up to two results.

PC update:

The program counter “PC” denotes memory address to read bytes of instruction from memory.

It is used to set next instruction’s address.

B.

Program Plan Intro

Processing stages:

The processing of an instruction has number of operations.

The operations are organized into particular sequence of stages.

It attempts to follow a uniform sequence for all instructions.

The description of stages are shown below:

Fetch:

It uses program counter “PC” as memory address to read instruction bytes from memory.

The 4-bit portions “icode” and “ifun” of specifier byte is extracted from instruction.

It fetches “valC” that denotes an 8-byte constant.

It computes “valP” that denotes value of “PC” plus length of fetched instruction.

Decode:

The register file is been read with two operands.

It gives values “valA” and “valB” for operands.

It reads registers with instruction fields “rA” and “rB”.

Execute:

In this stage the ALU either performs required operation or increments and decrements stack pointer.

The resulting value is termed as “valE”.

The condition codes are evaluated and destination register is updated based on condition.

It determines whether branch should be taken or not in a jump instruction.

Memory:

The data is been written to memory or read from memory in this stage.

The value that is read is determined as “valM”.

Write back:

The results are been written to register file.

It can write up to two results.

PC update:

The program counter “PC” denotes memory address to read bytes of instruction from memory.

It is used to set next instruction’s address.

C.

Program Plan Intro

Processing stages:

The processing of an instruction has number of operations.

The operations are organized into particular sequence of stages.

It attempts to follow a uniform sequence for all instructions.

The description of stages are shown below:

Fetch:

It uses program counter “PC” as memory address to read instruction bytes from memory.

The 4-bit portions “icode” and “ifun” of specifier byte is extracted from instruction.

It fetches “valC” that denotes an 8-byte constant.

It computes “valP” that denotes value of “PC” plus length of fetched instruction.

Decode:

The register file is been read with two operands.

It gives values “valA” and “valB” for operands.

It reads registers with instruction fields “rA” and “rB”.

Execute:

In this stage the ALU either performs required operation or increments and decrements stack pointer.

The resulting value is termed as “valE”.

The condition codes are evaluated and destination register is updated based on condition.

It determines whether branch should be taken or not in a jump instruction.

Memory:

The data is been written to memory or read from memory in this stage.

The value that is read is determined as “valM”.

Write back:

The results are been written to register file.

It can write up to two results.

PC update:

The program counter “PC” denotes memory address to read bytes of instruction from memory.

It is used to set next instruction’s address.

D.

Program Plan Intro

Processing stages:

The processing of an instruction has number of operations.

The operations are organized into particular sequence of stages.

It attempts to follow a uniform sequence for all instructions.

The description of stages are shown below:

Fetch:

It uses program counter “PC” as memory address to read instruction bytes from memory.

The 4-bit portions “icode” and “ifun” of specifier byte is extracted from instruction.

It fetches “valC” that denotes an 8-byte constant.

It computes “valP” that denotes value of “PC” plus length of fetched instruction.

Decode:

The register file is been read with two operands.

It gives values “valA” and “valB” for operands.

It reads registers with instruction fields “rA” and “rB”.

Execute:

In this stage the ALU either performs required operation or increments and decrements stack pointer.

The resulting value is termed as “valE”.

The condition codes are evaluated and destination register is updated based on condition.

It determines whether branch should be taken or not in a jump instruction.

Memory:

The data is been written to memory or read from memory in this stage.

The value that is read is determined as “valM”.

Write back:

The results are been written to register file.

It can write up to two results.

PC update:

The program counter “PC” denotes memory address to read bytes of instruction from memory.

It is used to set next instruction’s address.

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Answer 3

Question

Chapter 4.4, Problem 4.28PP

A.

Program Plan Intro

Processing stages:

The processing of an instruction has number of operations.

The operations are organized into particular sequence of stages.

It attempts to follow a uniform sequence for all instructions.

The description of stages are shown below:

Fetch:

It uses program counter “PC” as memory address to read instruction bytes from memory.

The 4-bit portions “icode” and “ifun” of specifier byte is extracted from instruction.

It fetches “valC” that denotes an 8-byte constant.

It computes “valP” that denotes value of “PC” plus length of fetched instruction.

Decode:

The register file is been read with two operands.

It gives values “valA” and “valB” for operands.

It reads registers with instruction fields “rA” and “rB”.

Execute:

In this stage the ALU either performs required operation or increments and decrements stack pointer.

The resulting value is termed as “valE”.

The condition codes are evaluated and destination register is updated based on condition.

It determines whether branch should be taken or not in a jump instruction.

Memory:

The data is been written to memory or read from memory in this stage.

The value that is read is determined as “valM”.

Write back:

The results are been written to register file.

It can write up to two results.

PC update:

The program counter “PC” denotes memory address to read bytes of instruction from memory.

It is used to set next instruction’s address.

B.

Program Plan Intro

Processing stages:

The processing of an instruction has number of operations.

The operations are organized into particular sequence of stages.

It attempts to follow a uniform sequence for all instructions.

The description of stages are shown below:

Fetch:

It uses program counter “PC” as memory address to read instruction bytes from memory.

The 4-bit portions “icode” and “ifun” of specifier byte is extracted from instruction.

It fetches “valC” that denotes an 8-byte constant.

It computes “valP” that denotes value of “PC” plus length of fetched instruction.

Decode:

The register file is been read with two operands.

It gives values “valA” and “valB” for operands.

It reads registers with instruction fields “rA” and “rB”.

Execute:

In this stage the ALU either performs required operation or increments and decrements stack pointer.

The resulting value is termed as “valE”.

The condition codes are evaluated and destination register is updated based on condition.

It determines whether branch should be taken or not in a jump instruction.

Memory:

The data is been written to memory or read from memory in this stage.

The value that is read is determined as “valM”.

Write back:

The results are been written to register file.

It can write up to two results.

PC update:

The program counter “PC” denotes memory address to read bytes of instruction from memory.

It is used to set next instruction’s address.

C.

Program Plan Intro

Processing stages:

The processing of an instruction has number of operations.

The operations are organized into particular sequence of stages.

It attempts to follow a uniform sequence for all instructions.

The description of stages are shown below:

Fetch:

It uses program counter “PC” as memory address to read instruction bytes from memory.

The 4-bit portions “icode” and “ifun” of specifier byte is extracted from instruction.

It fetches “valC” that denotes an 8-byte constant.

It computes “valP” that denotes value of “PC” plus length of fetched instruction.

Decode:

The register file is been read with two operands.

It gives values “valA” and “valB” for operands.

It reads registers with instruction fields “rA” and “rB”.

Execute:

In this stage the ALU either performs required operation or increments and decrements stack pointer.

The resulting value is termed as “valE”.

The condition codes are evaluated and destination register is updated based on condition.

It determines whether branch should be taken or not in a jump instruction.

Memory:

The data is been written to memory or read from memory in this stage.

The value that is read is determined as “valM”.

Write back:

The results are been written to register file.

It can write up to two results.

PC update:

The program counter “PC” denotes memory address to read bytes of instruction from memory.

It is used to set next instruction’s address.

D.

Program Plan Intro

Processing stages:

The processing of an instruction has number of operations.

The operations are organized into particular sequence of stages.

It attempts to follow a uniform sequence for all instructions.

The description of stages are shown below:

Fetch:

It uses program counter “PC” as memory address to read instruction bytes from memory.

The 4-bit portions “icode” and “ifun” of specifier byte is extracted from instruction.

It fetches “valC” that denotes an 8-byte constant.

It computes “valP” that denotes value of “PC” plus length of fetched instruction.

Decode:

The register file is been read with two operands.

It gives values “valA” and “valB” for operands.

It reads registers with instruction fields “rA” and “rB”.

Execute:

In this stage the ALU either performs required operation or increments and decrements stack pointer.

The resulting value is termed as “valE”.

The condition codes are evaluated and destination register is updated based on condition.

It determines whether branch should be taken or not in a jump instruction.

Memory:

The data is been written to memory or read from memory in this stage.

The value that is read is determined as “valM”.

Write back:

The results are been written to register file.

It can write up to two results.

PC update:

The program counter “PC” denotes memory address to read bytes of instruction from memory.

It is used to set next instruction’s address.

Expert Solution & Answer

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Check out a sample textbook solution

See solution

Answer 4

Question

Chapter 4.4, Problem 4.28PP

A.

Program Plan Intro

Processing stages:

The processing of an instruction has number of operations.

The operations are organized into particular sequence of stages.

It attempts to follow a uniform sequence for all instructions.

The description of stages are shown below:

Fetch:

It uses program counter “PC” as memory address to read instruction bytes from memory.

The 4-bit portions “icode” and “ifun” of specifier byte is extracted from instruction.

It fetches “valC” that denotes an 8-byte constant.

It computes “valP” that denotes value of “PC” plus length of fetched instruction.

Decode:

The register file is been read with two operands.

It gives values “valA” and “valB” for operands.

It reads registers with instruction fields “rA” and “rB”.

Execute:

In this stage the ALU either performs required operation or increments and decrements stack pointer.

The resulting value is termed as “valE”.

The condition codes are evaluated and destination register is updated based on condition.

It determines whether branch should be taken or not in a jump instruction.

Memory:

The data is been written to memory or read from memory in this stage.

The value that is read is determined as “valM”.

Write back:

The results are been written to register file.

It can write up to two results.

PC update:

The program counter “PC” denotes memory address to read bytes of instruction from memory.

It is used to set next instruction’s address.

B.

Program Plan Intro

Processing stages:

The processing of an instruction has number of operations.

The operations are organized into particular sequence of stages.

It attempts to follow a uniform sequence for all instructions.

The description of stages are shown below:

Fetch:

It uses program counter “PC” as memory address to read instruction bytes from memory.

The 4-bit portions “icode” and “ifun” of specifier byte is extracted from instruction.

It fetches “valC” that denotes an 8-byte constant.

It computes “valP” that denotes value of “PC” plus length of fetched instruction.

Decode:

The register file is been read with two operands.

It gives values “valA” and “valB” for operands.

It reads registers with instruction fields “rA” and “rB”.

Execute:

In this stage the ALU either performs required operation or increments and decrements stack pointer.

The resulting value is termed as “valE”.

The condition codes are evaluated and destination register is updated based on condition.

It determines whether branch should be taken or not in a jump instruction.

Memory:

The data is been written to memory or read from memory in this stage.

The value that is read is determined as “valM”.

Write back:

The results are been written to register file.

It can write up to two results.

PC update:

The program counter “PC” denotes memory address to read bytes of instruction from memory.

It is used to set next instruction’s address.

C.

Program Plan Intro

Processing stages:

The processing of an instruction has number of operations.

The operations are organized into particular sequence of stages.

It attempts to follow a uniform sequence for all instructions.

The description of stages are shown below:

Fetch:

It uses program counter “PC” as memory address to read instruction bytes from memory.

The 4-bit portions “icode” and “ifun” of specifier byte is extracted from instruction.

It fetches “valC” that denotes an 8-byte constant.

It computes “valP” that denotes value of “PC” plus length of fetched instruction.

Decode:

The register file is been read with two operands.

It gives values “valA” and “valB” for operands.

It reads registers with instruction fields “rA” and “rB”.

Execute:

In this stage the ALU either performs required operation or increments and decrements stack pointer.

The resulting value is termed as “valE”.

The condition codes are evaluated and destination register is updated based on condition.

It determines whether branch should be taken or not in a jump instruction.

Memory:

The data is been written to memory or read from memory in this stage.

The value that is read is determined as “valM”.

Write back:

The results are been written to register file.

It can write up to two results.

PC update:

The program counter “PC” denotes memory address to read bytes of instruction from memory.

It is used to set next instruction’s address.

D.

Program Plan Intro

Processing stages:

The processing of an instruction has number of operations.

The operations are organized into particular sequence of stages.

It attempts to follow a uniform sequence for all instructions.

The description of stages are shown below:

Fetch:

It uses program counter “PC” as memory address to read instruction bytes from memory.

The 4-bit portions “icode” and “ifun” of specifier byte is extracted from instruction.

It fetches “valC” that denotes an 8-byte constant.

It computes “valP” that denotes value of “PC” plus length of fetched instruction.

Decode:

The register file is been read with two operands.

It gives values “valA” and “valB” for operands.

It reads registers with instruction fields “rA” and “rB”.

Execute:

In this stage the ALU either performs required operation or increments and decrements stack pointer.

The resulting value is termed as “valE”.

The condition codes are evaluated and destination register is updated based on condition.

It determines whether branch should be taken or not in a jump instruction.

Memory:

The data is been written to memory or read from memory in this stage.

The value that is read is determined as “valM”.

Write back:

The results are been written to register file.

It can write up to two results.

PC update:

The program counter “PC” denotes memory address to read bytes of instruction from memory.

It is used to set next instruction’s address.

Expert Solution & Answer

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Check out a sample textbook solution

See solution

Answer 5

Chapter 4.4, Problem 4.28PP

A.

Program Plan Intro

Processing stages:

The processing of an instruction has number of operations.

The operations are organized into particular sequence of stages.

It attempts to follow a uniform sequence for all instructions.

The description of stages are shown below:

Fetch:

It uses program counter “PC” as memory address to read instruction bytes from memory.

The 4-bit portions “icode” and “ifun” of specifier byte is extracted from instruction.

It fetches “valC” that denotes an 8-byte constant.

It computes “valP” that denotes value of “PC” plus length of fetched instruction.

Decode:

The register file is been read with two operands.

It gives values “valA” and “valB” for operands.

It reads registers with instruction fields “rA” and “rB”.

Execute:

In this stage the ALU either performs required operation or increments and decrements stack pointer.

The resulting value is termed as “valE”.

The condition codes are evaluated and destination register is updated based on condition.

It determines whether branch should be taken or not in a jump instruction.

Memory:

The data is been written to memory or read from memory in this stage.

The value that is read is determined as “valM”.

Write back:

The results are been written to register file.

It can write up to two results.

PC update:

The program counter “PC” denotes memory address to read bytes of instruction from memory.

It is used to set next instruction’s address.

B.

Program Plan Intro

Processing stages:

The processing of an instruction has number of operations.

The operations are organized into particular sequence of stages.

It attempts to follow a uniform sequence for all instructions.

The description of stages are shown below:

Fetch:

It uses program counter “PC” as memory address to read instruction bytes from memory.

The 4-bit portions “icode” and “ifun” of specifier byte is extracted from instruction.

It fetches “valC” that denotes an 8-byte constant.

It computes “valP” that denotes value of “PC” plus length of fetched instruction.

Decode:

The register file is been read with two operands.

It gives values “valA” and “valB” for operands.

It reads registers with instruction fields “rA” and “rB”.

Execute:

In this stage the ALU either performs required operation or increments and decrements stack pointer.

The resulting value is termed as “valE”.

The condition codes are evaluated and destination register is updated based on condition.

It determines whether branch should be taken or not in a jump instruction.

Memory:

The data is been written to memory or read from memory in this stage.

The value that is read is determined as “valM”.

Write back:

The results are been written to register file.

It can write up to two results.

PC update:

The program counter “PC” denotes memory address to read bytes of instruction from memory.

It is used to set next instruction’s address.

C.

Program Plan Intro

Processing stages:

The processing of an instruction has number of operations.

The operations are organized into particular sequence of stages.

It attempts to follow a uniform sequence for all instructions.

The description of stages are shown below:

Fetch:

It uses program counter “PC” as memory address to read instruction bytes from memory.

The 4-bit portions “icode” and “ifun” of specifier byte is extracted from instruction.

It fetches “valC” that denotes an 8-byte constant.

It computes “valP” that denotes value of “PC” plus length of fetched instruction.

Decode:

The register file is been read with two operands.

It gives values “valA” and “valB” for operands.

It reads registers with instruction fields “rA” and “rB”.

Execute:

In this stage the ALU either performs required operation or increments and decrements stack pointer.

The resulting value is termed as “valE”.

The condition codes are evaluated and destination register is updated based on condition.

It determines whether branch should be taken or not in a jump instruction.

Memory:

The data is been written to memory or read from memory in this stage.

The value that is read is determined as “valM”.

Write back:

The results are been written to register file.

It can write up to two results.

PC update:

The program counter “PC” denotes memory address to read bytes of instruction from memory.

It is used to set next instruction’s address.

D.

Program Plan Intro

Processing stages:

The processing of an instruction has number of operations.

The operations are organized into particular sequence of stages.

It attempts to follow a uniform sequence for all instructions.

The description of stages are shown below:

Fetch:

It uses program counter “PC” as memory address to read instruction bytes from memory.

The 4-bit portions “icode” and “ifun” of specifier byte is extracted from instruction.

It fetches “valC” that denotes an 8-byte constant.

It computes “valP” that denotes value of “PC” plus length of fetched instruction.

Decode:

The register file is been read with two operands.

It gives values “valA” and “valB” for operands.

It reads registers with instruction fields “rA” and “rB”.

Execute:

In this stage the ALU either performs required operation or increments and decrements stack pointer.

The resulting value is termed as “valE”.

The condition codes are evaluated and destination register is updated based on condition.

It determines whether branch should be taken or not in a jump instruction.

Memory:

The data is been written to memory or read from memory in this stage.

The value that is read is determined as “valM”.

Write back:

The results are been written to register file.

It can write up to two results.

PC update:

The program counter “PC” denotes memory address to read bytes of instruction from memory.

It is used to set next instruction’s address.

Answer 6

Chapter 4.4, Problem 4.28PP

A.

Program Plan Intro

Processing stages:

The processing of an instruction has number of operations.

The operations are organized into particular sequence of stages.

It attempts to follow a uniform sequence for all instructions.

The description of stages are shown below:

Fetch:

It uses program counter “PC” as memory address to read instruction bytes from memory.

The 4-bit portions “icode” and “ifun” of specifier byte is extracted from instruction.

It fetches “valC” that denotes an 8-byte constant.

It computes “valP” that denotes value of “PC” plus length of fetched instruction.

Decode:

The register file is been read with two operands.

It gives values “valA” and “valB” for operands.

It reads registers with instruction fields “rA” and “rB”.

Execute:

In this stage the ALU either performs required operation or increments and decrements stack pointer.

The resulting value is termed as “valE”.

The condition codes are evaluated and destination register is updated based on condition.

It determines whether branch should be taken or not in a jump instruction.

Memory:

The data is been written to memory or read from memory in this stage.

The value that is read is determined as “valM”.

Write back:

The results are been written to register file.

It can write up to two results.

PC update:

The program counter “PC” denotes memory address to read bytes of instruction from memory.

It is used to set next instruction’s address.

Answer 7

Chapter 4.4, Problem 4.28PP

A.

Program Plan Intro

Processing stages:

The processing of an instruction has number of operations.

The operations are organized into particular sequence of stages.

It attempts to follow a uniform sequence for all instructions.

The description of stages are shown below:

Fetch:

It uses program counter “PC” as memory address to read instruction bytes from memory.

The 4-bit portions “icode” and “ifun” of specifier byte is extracted from instruction.

It fetches “valC” that denotes an 8-byte constant.

It computes “valP” that denotes value of “PC” plus length of fetched instruction.

Decode:

The register file is been read with two operands.

It gives values “valA” and “valB” for operands.

It reads registers with instruction fields “rA” and “rB”.

Execute:

In this stage the ALU either performs required operation or increments and decrements stack pointer.

The resulting value is termed as “valE”.

The condition codes are evaluated and destination register is updated based on condition.

It determines whether branch should be taken or not in a jump instruction.

Memory:

The data is been written to memory or read from memory in this stage.

The value that is read is determined as “valM”.

Write back:

The results are been written to register file.

It can write up to two results.

PC update:

The program counter “PC” denotes memory address to read bytes of instruction from memory.

It is used to set next instruction’s address.

Answer 8

B.

Program Plan Intro

Processing stages:

The processing of an instruction has number of operations.

The operations are organized into particular sequence of stages.

It attempts to follow a uniform sequence for all instructions.

The description of stages are shown below:

Fetch:

It uses program counter “PC” as memory address to read instruction bytes from memory.

The 4-bit portions “icode” and “ifun” of specifier byte is extracted from instruction.

It fetches “valC” that denotes an 8-byte constant.

It computes “valP” that denotes value of “PC” plus length of fetched instruction.

Decode:

The register file is been read with two operands.

It gives values “valA” and “valB” for operands.

It reads registers with instruction fields “rA” and “rB”.

Execute:

In this stage the ALU either performs required operation or increments and decrements stack pointer.

The resulting value is termed as “valE”.

The condition codes are evaluated and destination register is updated based on condition.

It determines whether branch should be taken or not in a jump instruction.

Memory:

The data is been written to memory or read from memory in this stage.

The value that is read is determined as “valM”.

Write back:

The results are been written to register file.

It can write up to two results.

PC update:

The program counter “PC” denotes memory address to read bytes of instruction from memory.

It is used to set next instruction’s address.

Answer 9

B.

Program Plan Intro

Processing stages:

The processing of an instruction has number of operations.

The operations are organized into particular sequence of stages.

It attempts to follow a uniform sequence for all instructions.

The description of stages are shown below:

Fetch:

It uses program counter “PC” as memory address to read instruction bytes from memory.

The 4-bit portions “icode” and “ifun” of specifier byte is extracted from instruction.

It fetches “valC” that denotes an 8-byte constant.

It computes “valP” that denotes value of “PC” plus length of fetched instruction.

Decode:

The register file is been read with two operands.

It gives values “valA” and “valB” for operands.

It reads registers with instruction fields “rA” and “rB”.

Execute:

In this stage the ALU either performs required operation or increments and decrements stack pointer.

The resulting value is termed as “valE”.

The condition codes are evaluated and destination register is updated based on condition.

It determines whether branch should be taken or not in a jump instruction.

Memory:

The data is been written to memory or read from memory in this stage.

The value that is read is determined as “valM”.

Write back:

The results are been written to register file.

It can write up to two results.

PC update:

The program counter “PC” denotes memory address to read bytes of instruction from memory.

It is used to set next instruction’s address.

Answer 10

C.

Program Plan Intro

Processing stages:

The processing of an instruction has number of operations.

The operations are organized into particular sequence of stages.

It attempts to follow a uniform sequence for all instructions.

The description of stages are shown below:

Fetch:

It uses program counter “PC” as memory address to read instruction bytes from memory.

The 4-bit portions “icode” and “ifun” of specifier byte is extracted from instruction.

It fetches “valC” that denotes an 8-byte constant.

It computes “valP” that denotes value of “PC” plus length of fetched instruction.

Decode:

The register file is been read with two operands.

It gives values “valA” and “valB” for operands.

It reads registers with instruction fields “rA” and “rB”.

Execute:

In this stage the ALU either performs required operation or increments and decrements stack pointer.

The resulting value is termed as “valE”.

The condition codes are evaluated and destination register is updated based on condition.

It determines whether branch should be taken or not in a jump instruction.

Memory:

The data is been written to memory or read from memory in this stage.

The value that is read is determined as “valM”.

Write back:

The results are been written to register file.

It can write up to two results.

PC update:

The program counter “PC” denotes memory address to read bytes of instruction from memory.

It is used to set next instruction’s address.

Answer 11

C.

Program Plan Intro

Processing stages:

The processing of an instruction has number of operations.

The operations are organized into particular sequence of stages.

It attempts to follow a uniform sequence for all instructions.

The description of stages are shown below:

Fetch:

It uses program counter “PC” as memory address to read instruction bytes from memory.

The 4-bit portions “icode” and “ifun” of specifier byte is extracted from instruction.

It fetches “valC” that denotes an 8-byte constant.

It computes “valP” that denotes value of “PC” plus length of fetched instruction.

Decode:

The register file is been read with two operands.

It gives values “valA” and “valB” for operands.

It reads registers with instruction fields “rA” and “rB”.

Execute:

In this stage the ALU either performs required operation or increments and decrements stack pointer.

The resulting value is termed as “valE”.

The condition codes are evaluated and destination register is updated based on condition.

It determines whether branch should be taken or not in a jump instruction.

Memory:

The data is been written to memory or read from memory in this stage.

The value that is read is determined as “valM”.

Write back:

The results are been written to register file.

It can write up to two results.

PC update:

The program counter “PC” denotes memory address to read bytes of instruction from memory.

It is used to set next instruction’s address.

Answer 12

D.

Program Plan Intro

Processing stages:

The processing of an instruction has number of operations.

The operations are organized into particular sequence of stages.

It attempts to follow a uniform sequence for all instructions.

The description of stages are shown below:

Fetch:

It uses program counter “PC” as memory address to read instruction bytes from memory.

The 4-bit portions “icode” and “ifun” of specifier byte is extracted from instruction.

It fetches “valC” that denotes an 8-byte constant.

It computes “valP” that denotes value of “PC” plus length of fetched instruction.

Decode:

The register file is been read with two operands.

It gives values “valA” and “valB” for operands.

It reads registers with instruction fields “rA” and “rB”.

Execute:

In this stage the ALU either performs required operation or increments and decrements stack pointer.

The resulting value is termed as “valE”.

The condition codes are evaluated and destination register is updated based on condition.

It determines whether branch should be taken or not in a jump instruction.

Memory:

The data is been written to memory or read from memory in this stage.

The value that is read is determined as “valM”.

Write back:

The results are been written to register file.

It can write up to two results.

PC update:

The program counter “PC” denotes memory address to read bytes of instruction from memory.

It is used to set next instruction’s address.

Answer 13

D.

Program Plan Intro

Processing stages:

The processing of an instruction has number of operations.

The operations are organized into particular sequence of stages.

It attempts to follow a uniform sequence for all instructions.

The description of stages are shown below:

Fetch:

It uses program counter “PC” as memory address to read instruction bytes from memory.

The 4-bit portions “icode” and “ifun” of specifier byte is extracted from instruction.

It fetches “valC” that denotes an 8-byte constant.

It computes “valP” that denotes value of “PC” plus length of fetched instruction.

Decode:

The register file is been read with two operands.

It gives values “valA” and “valB” for operands.

It reads registers with instruction fields “rA” and “rB”.

Execute:

In this stage the ALU either performs required operation or increments and decrements stack pointer.

The resulting value is termed as “valE”.

The condition codes are evaluated and destination register is updated based on condition.

It determines whether branch should be taken or not in a jump instruction.

Memory:

The data is been written to memory or read from memory in this stage.

The value that is read is determined as “valM”.

Write back:

The results are been written to register file.

It can write up to two results.

PC update:

The program counter “PC” denotes memory address to read bytes of instruction from memory.

It is used to set next instruction’s address.

Answer 14

Expert Solution & Answer

Answer 15

Expert Solution & Answer

Answer 16

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Answer 17

Ch. 4.1 - Prob. 4.1PP Ch. 4.1 - Prob. 4.2PP Ch. 4.1 - Prob. 4.3PP Ch. 4.1 - Prob. 4.4PP Ch. 4.1 - Prob. 4.5PP Ch. 4.1 - Prob. 4.6PP Ch. 4.1 - Prob. 4.7PP Ch. 4.1 - Prob. 4.8PP Ch. 4.2 - Practice Problem 4.9 (solution page 484) Write an...Ch. 4.2 - Prob. 4.10PP

Solution Summary: The author explains how the processing of an instruction is organized into specific sequence of stages.

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