LogixPro PLC Lab Manual for Programmable Logic Controllers
5th Edition
ISBN: 9781259680847
Author: Frank D. Petruzella
Publisher: McGraw-Hill Education
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Question
Chapter 9, Problem 1RQ
Program Plan Intro
a.
Master Control Reset (MCR) instructions:
- The MCR instruction is used to clear all set outputs within the fenced zone.
- In other words, it turns off all the non-retentive outputs in the fenced zone.
- Non-retentive outputs cannot retain their memory when they are de-energized.
- The MCR instruction within the zone are still scanned, but the scan time is reduced due to the false state of non-retentive outputs.
Expert Solution
Explanation of Solution
- In order to control a program section, two MCR output instructions are programmed.
- The fenced zone which needs to be controlled begins with one MCR instruction and the other MCR instruction at the end.
- An MCR rung with conditional inputs is placed at the beginning of the program section to be controlled.
- An MCR rung with no conditional inputs is placed at the end of the program section to be controlled.
- If the first MCR instruction becomes true, then all the outputs present in between the two MCR instructions will act according to the logic.
- If the MCR instruction becomes false, then all the non-retentive outputs will be de-energized and all the retentive outputs will retain their previous state.
Explanation of Solution
b.
False-to-true transition:
- When the MCR instruction makes a false-to-true transition, all rung outputs within the program section will be controlled by their respective input conditions.
- Initially, when the MCR instruction in the rung is false, all the rungs within the zone are made inactive and de-energizes all non-retentive outputs.
- Hence, all retentive devices such as latches will remain in their previous state.
Explanation of Solution
c.
True-to-false transition:
- When the MCR instruction makes a true-to-false transition, all non-retentive outputs within the program section will be de-energized.
- At the same time, all the retentive outputs within the fenced zone will remain in their previous state.
- Initially, when the MCR instruction in the rung is true, all the rungs within the zone are scanned and the outputs are energized and updated based on their logic.
- When the MCR instruction undergoes a transition from true-to-false, the scan ignores the input and de-energizes all the non-retentive outputs.
- Hence, all the retentive devices like latches, timers will remain in their previous state.
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A notice is recorded on VA page 30 if an instruction is denied. Why does this matter? A TLB controlled by software would operate more quickly than one controlled by hardware in the following scenarios:
What would occur if an instruction were to be disregarded? A software-managed TLB is speedier than a hardware-managed TLB in the following situations:
If an instruction is not accepted and it writes to VA page 30, what will happen? A TLB that is handled by software would perform better than a TLB that is controlled by hardware in the following situations:
Chapter 9 Solutions
LogixPro PLC Lab Manual for Programmable Logic Controllers
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- Assume an instruction: 0x00c6ba23 is located in memory at address: Answer the following questions when the instruction is executed based on the datapath and control shown in Figure 4.17. a). What are the values of the ALU Control to the ALU unit? b) What is the PC address after this instruction is executed? c)What is the values (either 0 or 1) of the control signals to the three multiplexers? d) What are the input values for the ALU?arrow_forwardThe system writes to VA page 30 if an instruction is not accepted; what does it mean? A TLB that is controlled by software rather than hardware might perform better in the following cases:arrow_forwardConsider the following MIPS instruction: add $t1, $t2, $t3 a. What is the ALUSrc control signal value: top or bottom? b. What is the MemtoReg control signal value: top or bottom? c. What is the PCSrc control signal value: top or bottom?arrow_forward
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- Need perfectly correct, otherwise skip. write the exchange instruction code.arrow_forwardBoth the source and the destination are left unchanged when using a CMP instruction.Decide on one of the following:True \Falsearrow_forwardWhat takes place if a writing instruction is sent to VA page 30 without being approved? The following scenarios call for a faster software-managed TLB than a hardware-managed TLB:arrow_forward
- The problems below refer to the following sequence of instructions, and assume that it is executed on a 5-stage pipelined data-path: add $t5, $t2, $t1lw $t3, 4($t5)lw $t2, 0($t2)or $t3, $t5, $t3sw $t3, 0($t5) -------------------------------------------------------------------------------------- Identify the instruction type for the sequence of instructions. Identify the dependencies in the sequence of instructions.arrow_forwardDirect exchange of data between two memory locations is permitted by XCHG instruction. Select one: True Falsearrow_forwardDescribe Direct Memory Access (DMA), as well as an input/output timing diagram with clock synchronization.arrow_forward
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