3. Design a digital system with logic gates that will convert the input code-X to output code- Y. Assume the outputs of the missing inputs as don't care (x - don't care). Code - X Code - Y D M 1 1 1 1 0. 01 1 1 1 1 1 1 1 1 1 01 1 1 1 01 1 1 1 01 1 01 1 1 1 01 B
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- ehcu.org/pluginfile 100% 10 / 11 locations, count how many times is 0 and how many times 1 is. Questions:- 1- Write a program in assembly language to perform the following logic ci BL CL DL [5100]- 2- How we can perform the NEG and NOT instructions by using different instructions. 3- Write the following program by using different instruction or instructions for each instruction on the program. MOV AL , 00 MOV BX , FFFF XOR CL , FF NEG BYTE PTR [DI] AND CX , LGAn X-input exclusive-OR gate and a Y-input exclusive-OR gate (where X=3, Y=4 have their outputs connected to a 2-input exclusive-NORgate. Do the following:a) Draw the logic diagram and analyze the logic expression of the output (in standard SOPform).b) List out all essential prime implicants.Implement the function, W using ONE 4-to-1 multiplexer and other logic gates. b) Implement the function, X using ONE 4-to-1 multiplexer and other logic gates. Implement the function, Y using TWO 4-to-1 multiplexer and other logic gates. d) Implement the function, Z using ONE 8-to-1 multiplexer and other logic gates. Table Q1 ВCD Braille A B D W Y 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 A ololO
- T: Answer thne f. questions: 1) The hexadecimal number ´Al' has the decimal value equivalent to (A) 80 (B) 161 (C) 100 (D) 101 2) The output of a logic gate is 0 when all its inputs are logic 1. The logic is either (A) a NAND or an EX-OR (B) an OR or an EX-NOR (C) an AND or an EX-OR (D) an NOR or an EX-NOR 3) The Gray code of the Binary number 1100111 is (A) 1011011 (B) 1010100 (C) 1001001 (D) 101101 4) When simplified with Boollean Algebra (a+b)(a+c) simplifies to (A) a (B) a+a(b+c) (C) a(1+bc) (D) a+bc 5) -31 is represented as a sign Binary number ( using Sign-magnitude form ) equal to (A) 00011111 (B) 10101001 (C) 01110010 (D) 00101101 6) The Binary number 110111 is equivalent to decimal number (A) 25 (B) 55 (C) 26 (D) 34 7) With 4 bit, what the range of decimal values if the number is 2's complement signed number. (A) -32 to +31 (B) -2 to +1 (C) -8 to +7 (D) None of theseHow to build this circuit? (on Digital or Logisim) Binary-coded decimal is an alternative method of representing integers using binary. In it, each base-10 digit is represented by four bits, thus each nibble takes one of 10 values (0000 through 1001). Therefore, using BCD, 42 (decimal) is represented as 0100 0010 (binary) and 196 (decimal) is represented as 0001 1001 0110 (binary). Create a circuit in Logisim that accepts as input a pair of two-digit integers represented as BCD and outputs their sum in BCD. Any and all Digital components are fair game. You can assume that all inputs will be valid BCD-encoded numbers.Q3) A - Convert the Excess-3 to binary number : ( 110001011100.10001010)ex-3 B- convert each Gray code to binary: 1-( 011010001001)G 2-(59)D
- d) Draw the schematics of 4-bit synchronous and asynchronous MOD-8 counters and comment on their pros and cons. e) Calculate the noise margin for a logic gate with the following logic levels: VIL = 1.1 V, VIH = 3.2 V, VOL = 0.6 V, VOH = 4.0 V.The numbers from 0-9 and a no characters is the Basic 1 digit seven segment display * .can show False True In a (CA) method of 7 segments, the anodes of all the LED segments are * "connected to the logic "O False True Some times may run out of pins on your Arduino board and need to not extend it * .with shift registers True FalseThe waveforms in Figure 08 are applied to the 4-bit parity logic. Determine the output wave-form in proper relation to the inputs. For how many bit times does even parity occur, and how is it indicated? The timing diagram includes eight bit times. Q.21 Bit time Ao A1 A2 A3 FIGURE 08
- We want to design a circuit to detect prime numbers.The input of the circuit is a 4-bit binary number and the output is a single bit and should show one when the number is prime and zero otherwise.B. Implement the circuit using a 4× 1 multiplexer and combinational logic gates.C. Implement the circuit using only one decoder and one OR gate. What is the size of the decoder you use?Logic Gates:* 7404LS (NOT)* 7408LS (AND)* 7432LS (OR)* 7400LS (NAND)* 7402LS (NOR)* 7486LS (EX-OR)Or you can use 74HCxx versions. Task 2: 4 INPUT PRIORITY ENCODERa) Write the truth table.b) Find the outputs in terms of min terms using minimal expression.c) By using K map, find the simple/simplest expression of theoutputs.d) Draw the circuit diagram. (Simulation design will be accepted.)e) Simulate the circuit & explain your results. (Please do notdesign separate simulations for each output. You should design ONEsimulation including all inputs and outputs.)Design a combinational circuit with 3-inputs and 1-output. The output is equal to logic-1 when the binary value of the input is less than 3. And the output is logic-0 otherwise.