b. Assume that there are FIVE (4) instructions to be executed in a pipeline consists of SIX (6) stages (FI, DI, FO, EI, ME, WO) with delays of 1 time unit for each stage. Each instruction has to go through all the 6 stages with no memory conflicts and no branches involved. i. Draw a timing diagram for the pipelining of the above instructions. ii. Calculate the speedup for the implementation of pipelining.

Computer Networking: A Top-Down Approach (7th Edition)
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ISBN:9780133594140
Author:James Kurose, Keith Ross
Publisher:James Kurose, Keith Ross
Chapter1: Computer Networks And The Internet
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b. Assume that there are FIVE (4) instructions to be executed in a pipeline consists of
SIX (6) stages (FI, DI, FO, EI, ME, WO) with delays of 1 time unit for each stage.
Each instruction has to go through all the 6 stages with no memory conflicts and no
branches involved.
Draw a timing diagram for the pipelining of the above instructions.
ii.
Calculate the speedup for the implementation of pipelining.
Transcribed Image Text:b. Assume that there are FIVE (4) instructions to be executed in a pipeline consists of SIX (6) stages (FI, DI, FO, EI, ME, WO) with delays of 1 time unit for each stage. Each instruction has to go through all the 6 stages with no memory conflicts and no branches involved. Draw a timing diagram for the pipelining of the above instructions. ii. Calculate the speedup for the implementation of pipelining.
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