Q2/ Draw the following data formats for the bit stream [1 10011 0] (i) (ii) (iii) (iv) Polar NRZ Unipolar RZ AMI Manchester
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![Q2/ Draw the following data formats for the bit stream [110011 0]
(i)
(ii)
(iii)
(iv)
Polar NRZ
Unipolar RZ
AMI
Manchester](/v2/_next/image?url=https%3A%2F%2Fcontent.bartleby.com%2Fqna-images%2Fquestion%2F60e55a2b-17d1-4726-9bec-99c666c72cdd%2F623871a2-fde6-488c-bfe0-d2e7d985468a%2F2ikmw2f_processed.jpeg&w=3840&q=75)
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- A 12-bit ADC unit has an input voltage range of -ve 5to +ve 5 VDC. What is the minimum difference in voltage required by an analogue signal for the digitally converted value to reflect that change(resolution)? 0.0012V DC b. None of all 0.083V DC C. 0.0024V DC 4Design counter that counts from 00 to 59, using the IC 74LS90 ripple counter and use two 7 segment display to display the result count. You can also use 7447 binary to 7-segment Display Decoder. i need the diagram of itIV) Convert Decimal to Hexadecimal (a) 974510 (b) 2976.5410 V) Convert from Binary to Hexadecimal (a) 10010110101012 (b) 111011101.010101012 VI) Convert from Hexadecimal to Binary (a) 7CAB516 (b) AF2.12B16
- Q2) Convert to decimal number: 1) The hexadecimal number (FD45) 2) The octal number (7024) 3) The EX-3 (11001010.00110110) 4) The number of base 9 (8301)Write an assembly 8051 code to count a hexadecimal digit every second and display it on the 7-segment.Q1. Show the implementation of 4 bit binary to gray code (shown in below table) converter using either EPROM or PLA. In Gray code only one bit changes at a time. Binary Gray code Decimal equivalent 0000 0000 1 0001 0001 0010 0011 3 0011 0010 4 0100 0110 5 0101 0111 6. 0110 0101 7 0111 0100 8. 1000 1100 1001 1101 10 1010 1111 11 1011 1110 12 1100 1010 13 1101 1011 14 1110 1001 15 1111 1000
- Consider a 4-bit ADC and full scale voltage measurement range of (-37 to 37).The Resolution will be O 4.62 O 1.75 O 0.41 O 0.41 In CRO, if the electron beam emerging from the electron gun is left alone, it will strike the screen as straight line. Select one: OTrue O FalseC40 Three common types of ADC architectures are the Successive Approximation Register (SAR) ADC, the flash ADC, and the sigma delta ADC. A particular application requires 10-bit digitisation at a sampling rate of 1 MHz. Which of the following statements are true? A. A flash ADC is B. A sigma delta C. A typical SAR ADC D. None recommended ADC is is recommended of as it is needed recommended as it within these to sample at as it is needed specification and to get 10-bit digitisation 1MHZ has the lowest costA 10-bit ADC with Viet - 3.1 V has a step size equal to mV (you have to write 2 digits after the decimal point.. not.) for Vin=28% the output is equal to NB to obtain the digital result you have to use the value of the step size filled in the first part of the question
- The required 7-segmrnt decoder should have 3-inputs (which are the bits of the binary number desired to be designed, call them A,B,C), and 7 outputs (the 7 segments of the display unit which are a, b, c, d, e, f & g). 8. gf a b t la Ob d Dp e d8c Dp The 7-segment to be used is of common anode type. Consequently, any segment will be ON if its input is Low, meaning that for displaying 0 the segments inputs (a,b,c,d,e,f.g) should be (0000001), or g will be OFF while all the others are ON. 1- Make a table explaining the inputs and the corresponding outputs for the 6 combinations input (000.101), assuming the other two combinations as don't care. 2- Find the output as a function of the inputs (A,B,C) using K-map to minimize the expressions 3- Show your design using 2-input, and 3-input NAND gates, and inverter.Discuss the effect of changing the number of bits on the recovered analog waveformCode ConverterCreate a circuit that converts NBCD code into 5311 code. If the input is not part of the NBCDcode, the output is all 1.Input:4 -bit NBCD code Output:4-bits 5311 code Hint:You must create a Karnaugh map for each output bits.