Using the Figure 4.11 in the text (also shown in slide 26 of lecture on Feb 24th, and below), trace the execution of the instructions for the next TWO cycles, by indicating what are the values on the busses (wires), or registers that correspond to the following entries in the table:For clarity, please show your answer in Hexadecimal system the way the PC value is shown for the 'Current Clock Cycle' in the tableIf an entry is a 'don't care' for that cycle you have to indicate it as "DONT CARE", as shown below alsoNet/Register/ControlCurrent Clock Cycle (Show in Hex)Next Clock Cycle (Show in Hex)Contents of PC0X00000014 Read Register 1 value (input) Read Register 2 value (input) Write Register value (input) Write Data value of 'Registers' block (input) Read data 1 (output) Read data 2 (output) Input to the Sign-extend (16 bit value)DONT CARE Output of the Sign-extend (32 bit value) Address input to the Data Memory Value of the Write Data input to Data Memory PCSrcAddALUAdd resultShiftleft 2Readregister 1Readregister 2Registers ReadReadaddressALUSrc4ALU operationRead| MemWritedata 1| MemtoRegZeroALU ALUresultInstructionReadWriteregisterWriteAddressMdata 2dataInstructionmemorydataWritedata memoryDataRegWrite1632MemReadSign-extendFIGURE 4.11 The simple datapath for the core MIPS architecture combines the elements required by differentinstruction classes. The components come from Figures 4.6, 4.9, and 4.10. This datapath can execute the basic instructions (load-storeword, ALU operations, and branches) in a single clock cycle. Just one additional multiplexor is needed to integrate branches. The support forjumps will be added later.CS3339 Dr. Joshi, Texas State University26

Given FIGURE 4.11 The simple datapath for the core MIPS architecture combines the elements…

Answered: Read address Read register 1 ALUSrc ALU…

Computer Networking: A Top-Down Approach (7th Edition)

7th Edition

ISBN:9780133594140

Author:James Kurose, Keith Ross

Publisher:James Kurose, Keith Ross

Chapter1: Computer Networks And The Internet

Section: Chapter Questions

Problem R1RQ: What is the difference between a host and an end system? List several different types of end...

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Using the Figure 4.11 in the text (also shown in slide 26 of lecture on Feb 24^th, and below), trace the execution of the instructions for the next TWO cycles, by indicating what are the values on the busses (wires), or registers that correspond to the following entries in the table:

For clarity, please show your answer in Hexadecimal system the way the PC value is shown for the 'Current Clock Cycle' in the table
If an entry is a 'don't care' for that cycle you have to indicate it as "DONT CARE", as shown below also

Net/Register/Control	Current Clock Cycle (Show in Hex)	Next Clock Cycle (Show in Hex)
Contents of PC	0X00000014
Read Register 1 value (input)
Read Register 2 value (input)
Write Register value (input)
Write Data value of 'Registers' block (input)
Read data 1 (output)
Read data 2 (output)
Input to the Sign-extend (16 bit value)	DONT CARE
Output of the Sign-extend (32 bit value)
Address input to the Data Memory
Value of the Write Data input to Data Memory