1- I/O device informs the computer if it is ready for a transfer by using-----
1- I/O device informs the computer if it is ready for a transfer by using-----
Computer Networking: A Top-Down Approach (7th Edition)
7th Edition
ISBN:9780133594140
Author:James Kurose, Keith Ross
Publisher:James Kurose, Keith Ross
Chapter1: Computer Networks And The Internet
Section: Chapter Questions
Problem R1RQ: What is the difference between a host and an end system? List several different types of end...
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Question
![docs.google.com/forms
:D
1- I/O device informs the computer if
it is ready for a transfer by using--
A- interrupt
B- In and Out instructions
C- wait state
D- none of the above
2- A computer with memory size
128K word with 32 bits each. its
instruction format has indirect bit I,
REG. part to specify one of 16
registers, an opcode part OPCOD,
and address part ADR. The number of
bits in REG, OPCOD, and ADR
respectively are:
A- 4, 16, and 16
B- 4, 10, and 16
C- 4, 16, and 17
D- 4, 10, and 17
II](/v2/_next/image?url=https%3A%2F%2Fcontent.bartleby.com%2Fqna-images%2Fquestion%2F09bbda32-d6a1-4a87-a30e-d2087fe7bdc9%2F989c55c2-3e3b-4df1-bca6-5bea002cbea6%2Fnkxvbr8_processed.jpeg&w=3840&q=75)
Transcribed Image Text:docs.google.com/forms
:D
1- I/O device informs the computer if
it is ready for a transfer by using--
A- interrupt
B- In and Out instructions
C- wait state
D- none of the above
2- A computer with memory size
128K word with 32 bits each. its
instruction format has indirect bit I,
REG. part to specify one of 16
registers, an opcode part OPCOD,
and address part ADR. The number of
bits in REG, OPCOD, and ADR
respectively are:
A- 4, 16, and 16
B- 4, 10, and 16
C- 4, 16, and 17
D- 4, 10, and 17
II
![A & O O 1::EA
3- The 8086 to enable the most
significant data bus bits (D15-D8)
during a read or a write operation
using-----
A- RD, WR pin
В- ВНЕ pin
C- S3/S6 status bus pin
D- 10/ M
4- A basic computer has 12 registers,
a memory unit and a control unit. The
number of its common bus selectors
is: *
А-3
В-4
C-5
D-6
5- the 8088 microprocessor uses ----
to demultiplex its address/data
II](/v2/_next/image?url=https%3A%2F%2Fcontent.bartleby.com%2Fqna-images%2Fquestion%2F09bbda32-d6a1-4a87-a30e-d2087fe7bdc9%2F989c55c2-3e3b-4df1-bca6-5bea002cbea6%2Fs0q60z_processed.jpeg&w=3840&q=75)
Transcribed Image Text:A & O O 1::EA
3- The 8086 to enable the most
significant data bus bits (D15-D8)
during a read or a write operation
using-----
A- RD, WR pin
В- ВНЕ pin
C- S3/S6 status bus pin
D- 10/ M
4- A basic computer has 12 registers,
a memory unit and a control unit. The
number of its common bus selectors
is: *
А-3
В-4
C-5
D-6
5- the 8088 microprocessor uses ----
to demultiplex its address/data
II
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