1. Simplify the following function and implement it with a two-level NAND gate circuit. F(A,B,C,D)=A'B'C + AC' + ACD + ACD' + A'B'D' 2. Implement a full adder by using two 4 x 1 multiplexers.

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1. Simplify the following function and implement it with a two-level NAND gate circuit.
F(A,B,C,D)=A'B'C + AC' + ACD + ACD' + A'B'D'
2. Implement a full adder by using two 4 x 1 multiplexers.
3. Construct a 5-to-32 line decoder by using four 3-to-8 line decoders with enable input and one
2-to-4 line decoder.
4. Design a two-bit binary counter with a single input x. When the input x=0, the counter stops
counting and when the input x=1, the counter continues counting. In your design use JK flip-
flops. Show the state diagram and the state table.
Transcribed Image Text:1. Simplify the following function and implement it with a two-level NAND gate circuit. F(A,B,C,D)=A'B'C + AC' + ACD + ACD' + A'B'D' 2. Implement a full adder by using two 4 x 1 multiplexers. 3. Construct a 5-to-32 line decoder by using four 3-to-8 line decoders with enable input and one 2-to-4 line decoder. 4. Design a two-bit binary counter with a single input x. When the input x=0, the counter stops counting and when the input x=1, the counter continues counting. In your design use JK flip- flops. Show the state diagram and the state table.
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