1. The number 23.25 translated into a normalized floating point number, with a 10-bit mantissa and a 6-bit exponent. A. 0110110000 000101 B. 0101110000 000001 C. 0101110100 000101 Đ 0000010111 000100

Introductory Circuit Analysis (13th Edition)
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Chapter1: Introduction
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Solve Q1 and 2 showing detailly and clearly all the steps involved.

The number 23.25 translated into
a normalized floating point
number, with a 10-bit mantissa
and a 6-bit exponent.
A. 0110110000 000101
B. 010111000ó 000001
C. 0101110100 000101
-D. 0000010111 000100
С. 252
D. 255
6. Decimal equ
number 101
A. 41.7875
B. 41.5875
C. 41.6875
D. 41.1875
2. Two registers involved in the
fetch-execute cycle are:
A. The program counter and the
stack pointer.
B. The Accumulator and the
7. In register=
operands a
A. Cache
B. Seconc
CThe CF
D. Primar
program counter.
C. The accumuiator and the
current instruction register.
D. The memory address register
and the memory data register.
3. A NAND gate has inputs A and B.
its output is connected to both
inputs of another NAND gate. An
equivalent gate for these two
NAND gates is a(n
8. In an instr
address p
address a
addressin
Ă. Immer
B. Direct
C. Indire
D. Index
Transcribed Image Text:The number 23.25 translated into a normalized floating point number, with a 10-bit mantissa and a 6-bit exponent. A. 0110110000 000101 B. 010111000ó 000001 C. 0101110100 000101 -D. 0000010111 000100 С. 252 D. 255 6. Decimal equ number 101 A. 41.7875 B. 41.5875 C. 41.6875 D. 41.1875 2. Two registers involved in the fetch-execute cycle are: A. The program counter and the stack pointer. B. The Accumulator and the 7. In register= operands a A. Cache B. Seconc CThe CF D. Primar program counter. C. The accumuiator and the current instruction register. D. The memory address register and the memory data register. 3. A NAND gate has inputs A and B. its output is connected to both inputs of another NAND gate. An equivalent gate for these two NAND gates is a(n 8. In an instr address p address a addressin Ă. Immer B. Direct C. Indire D. Index
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