1. Using the digraph below, answer the following questions: Ti (10) O- b. T4 (9) O T7 (13) O T2 (7) T's (5) Ts (4) T3 (4) O To (4) T9 (6) O a. Create a schedule with two processors using the priority list: T1, T2, T3, T4, T5, T6, T7, T8, T9 Determine the priority list using the decreasing time algorithm. algorithm

1. Using the digraph below, answer the following questions: Ti (10) O- b. T4 (9) O T7 (13) O T2 (7) T's (5) Ts (4) T3 (4) O To (4) T9 (6) O a. Create a schedule with two processors using the priority list: T1, T2, T3, T4, T5, T6, T7, T8, T9 Determine the priority list using the decreasing time algorithm. algorithm

C++ for Engineers and Scientists

4th Edition

ISBN:9781133187844

Author:Bronson, Gary J.

Publisher:Bronson, Gary J.

Chapter2: Problem Solving Using C++using

Section2.5: Variables And Declaration Statements

Problem 10E

See similar textbooks

Similar questions

li $t2, 2 L1: add $t1, $t1, $t2 sub $t1, $t1, $t3 bne $t1, $t4, L1 sub $t4, $s0, $t3 Given the modified single-cycle processor shown below, what are the values (in binary) of instruction[31-26], instruction[25-21], instruction[20-16], instruction[15-11], instruction[5-0], Read data 1, Read data 2, ALU zero, PCSrc, and all the main control decoded output signals when the time is at 1950 ns. The below single-cycle processor diagram can be used for your reference. Note: A new decoded signal output “Tzero” is added for executing “bne” instruction. The signal definition is described below: Instruction Opcode New Main Control Output Signal beq 00100b (4d) Tzero = 0 bne 00101b (5d) Tzero = 1 At the moment of 1950 ns, the below values (0, 1 or X) are:instruction[31-26] = instruction[25-21] = instruction[20-16] =instruction[15-0] = Read data 1 output = Read data 2 output = RegDst = ALUSrc = MemtoReg = RegWrite =…
(Amdahl’s law question) Suppose you have a machine which executes a programconsisting of 50% floating point multiply, 20% floating point divide, and the remaining 30% are fromother instructions.(a) Management wants the machine to run 4 times faster. You can make the divide run at most 3 timesfaster and the multiply run at most 8 times faster. Can you meet management’s goal by making onlyone improvement, and which one?
Q1: Suppose the hypothetical processor has two I/O instructions: (3+3+3)0011=Load AC from I/O0111=Store AC to I/OIn this case, the 12-bit address identifies a particular external device. Show the program execution using figure for the following program:a) Load AC from device 6b) Add contents of memory location 880c) Store AC to device 7 (Note: Question is to be solved similar to the pictures attached with minimum explaination of a line or two with the steps and SHOULD include the memory location 880 as stated in the question)
Analyze the flow chart below. QUESTIONS: 6. Determine - calculate the delay generated by [DE] and the value of "F" after the instruction [A]<-[A]v[E] is executed the first and the 10th time. 7. Determine - discuss the contents of the displays. 8. Estimate - Calculate the shortest execution time of the program in terms of instructions, cycles, and seconds. 9. Repeat Part 8 for the longest execution time. 10. Are the two PUSHH instructions required? Discuss.[}][|
5. When two words are multiplied (one in BX), the most significant word of result will be in _______, and the least significant word will be in __________ (1 Mark) a. BX, CX b. CX, BX c. AX, DX d. DX, AX 6. Compare and contrast SUB and CMP instructions? (1 Mark) 7. Write the contents of AH and BL after execution of the program. (1 Mark) MOV AH,40h SAL AH, 01 MOV BL,80h SAR BL,01 HLT AH= ____________ BL= ____________ 8. Write the contents of AL and BL register after execution of the program (1 Mark) MOV AL, FFh MOV BL, AL CMP AL, F0H SUB BL,10H HLT AL= ____________ BL= ____________ 9. Identify and correct the mistakes. (1 Mark) MOV AX, 32H ____________________ MOV BL, 2424H ____________________ DAS AX, BL ____________________ HLT ____________________ 10. Write an ALP to rotate right the contents of AL register 4 times including carry and save the result in DH register (1 Mark)
[Note: You are allowed to use only instructions implemented by the actual MIPS hardwareprovided in attached photos below. Use assembly language format from the references orthe book. Note, base ten numbers are listed as normal (e.g. 23), binary numbers areprefixed with 0b and hexadecimal numbers are prefixed with 0x.] Write a C program and corresponding assembly program based on MIPS ISA that reads three edges for a triangle and computes the perimeter if the input is valid. Otherwise, display that the input is invalid. The input is valid if the sum of every pair of two edges is greater than the remaining edge. [Direction: You can consult any resources such as books, online references, and videosfor this assignment, however, you have to properly cite and paraphrase your answerswhen it is necessary.] solve it any how urgently please.
Question No.4: Process Synchronization. Consider the classical synchronization problem of dining philosophers in which, n philosophers sit at a round table with one chop stick between each philosopher (chop stick on the right hand belong to each philosopher). Philosophers do one work at a time i.e. either are thinking or eating. To eat, they need to have two chop sticks such that the chopsticks to their left and their right. a. Provide an algorithm using Test-and-Set logic (disabling interrupts) to solves the diningphilosopher problem. b. Show the steps of the solution validatingi) Mutual exclusion, ii) Progress, iii) Must be viable for any number of philosophers and ensure that none of them starves to death.
1.BL=00, after instruction DEC BL is executed, CF =? 2.CH=80H; after ROL CH, 1; CH=?
Q.No.2: For a program execution, Step 1 is completed in the below diagram by filling the required CPU registers (PC, AC and IR). Fill the same registers for remaining steps. The contents of memory are shown hexadecimal and the list of opcodes is as under
QUESTION 43 Using the Vole machine language reference in Appendix C in the book, what is the instruction that performs the following: JUMP to the instruction at address 88 if the contents of register 2 equals that of register 0.
need proper solution q) State whether the following instructions are valid or invalid? Define the valid instructions. In case any instruction is invalid then state the reason of their invalidity. ADD BX, [1234H] AND 23H, AL CMP AL, SP JCXZ Telecom IMUL BL q) Why logical instructions are also termed as bit-manipulated instructions? Perform the AND (logic multiplication) and OR (logic addition) operation on the given numbers: A: 10011010 B: 00110101
Generate MIPS code for the following code segments assuming that all variables are in memory locations. please solve with clear steps not handwritten if possible