PLEASE ANSWER 11 TO 15 IN DETAIL 6) Basic Instruction Cycle7) Instruction Cycle State Diagram8) Instruction Cycle State with Interrupts9) Bus Interconnection Scheme10) Comparison all Method of Accessing Units of Data11) Difference between the Cache and Main Memory12) Virtual Memory13) Write-policy in memories14) Comparison between SRAM versus DRAM15) ROM, PROM, EPROM, EPROM, EEPROM, and Flash Memory

11)main memory is otherwise called Random Access Memory. It is a memory unit that straightforwardly…

Answered: 11) Difference between the Cache and…

11) Difference between the Cache and Main Memory 12) Virtual Memory 13) Write-policy in memories 14) Comparison between SRAM versus DRAM

Database System Concepts

7th Edition

ISBN:9780078022159

Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan

Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan

Chapter1: Introduction

Section: Chapter Questions

Problem 1PE

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Question P .Implement and Compute the total memory traffic in bytes for both instruction fetch and instruction execution for the code that implements the expression a=(b*c) d on 3-, 2-, 1-, and 0- address machines. Assume opcode occupy one byte, address occupy two bytes and data values also occupy two bytes. The word length is one byte. Full explain this question and text typing work only We should answer our question within 2 hours takes more time then we will reduce Rating Dont ignore this line
5. Consider the 2-address instruction SUB R1, X which subtract the contents of location X from the contents of register R1 and places the result in R1. The ALU can complement either of its inputs, but it cannot subtract. Integers are stored in two’s complement representation.List the sequence of micro-operations to implement the instruction. Assume processor registers PC, MAR, MBR, IR with their usual meanings
Q1: Suppose the hypothetical processor has two I/O instructions: (3+3+3)0011=Load AC from I/O0111=Store AC to I/OIn this case, the 12-bit address identifies a particular external device. Show the program execution using figure for the following program:a) Load AC from device 6b) Add contents of memory location 880c) Store AC to device 7 (Note: Question is to be solved similar to the pictures attached with minimum explaination of a line or two with the steps and SHOULD include the memory location 880 as stated in the question)
d Since the patterns of access for instructions and data differ, it is common to providing separate instruction and data caches (often L1). True False e The number of compulsory misses can never be reduced. True False
D] An integer arithmetic unit that can perform addition and multiplication of 16-bit unsigned numbers is to be used to multiply two 32-bit unsigned numbers. All operands, intermediate results, and final results are held in 16-bit registers labeled R0 through R15. The hardware multiplier multiplies the contents of Ri (multiplicand) by Rj (multiplier) and stores the double-length 32-bit product in registers Rj and Rj+1, with the low-order half in Rj. When j = i − 1, the product overwrites both operands. The hardware adder adds the contents of Ri and Rj and puts the result in Rj. The input carry to an Add operation is 0, and the input carry to an Add-with-carry operation is the contents of a carry flag C. The output carry from the adder is always stored in C. Specify the steps of a procedure for multiplying two 32-bit operands in registers R1, R0, and R3, R2, high-order halves first, leaving the 64-bit product in registers R15, R14, R13, and R12. Any of the registers R11 through R4 may…
The following diagram shows some registers like processor registers R1 and R2, Program counter PC and Index Register XR along with their corresponding values. It also shows a memory with some instructions like instruction A and next instruction. The memory holds instruction B which consists of four fields as given above. First field of instruction represents the addressing Mode (I), second field specifies Opcode (operation code) ADD representing operation addition, the third field represents Address field 1 and the fourth field represents Address field 2. Consider the following addressing modes, evaluate the result of execution of above instruction by giving steps of evaluation for each addressing mode for the scenario given above. Ø Immediate Mode Ø Direct Mode Ø Register Ø Relative Mode Ø Index Mode Choose your own values for variables (v – w), T1, T2. Choose any one of the given value for T3 (200 or 300). V=700 W=800 T1=200 T2=200 T3=300
The following diagram shows some registers like processor registers R1 and R2, Program counter PC and Index Register XR along with their corresponding values. It also shows a memory with some instructions like instruction A and next instruction.The memory holds instruction B which consists of four fields as given above. First field of instruction represents the addressing Mode (I), second field specifies Opcode (operation code) ADD representing operation addition, the third field represents Address field 1 and the fourth field represents Address field 2. Consider the following addressing modes, evaluate the result of execution of above instruction by giving steps of evaluation for each addressing mode for the scenario given above. Immediate Mode  Direct Mode Register Relative Mode Index ModeNote: Choose your own values for variables k – w, T1, T2. Choose any one of the given value for T3 (200 or 300).
1.3 Discuss the importance of the Random Access Memory (RAM) and further discuss how it differs to Read Only Memory (ROM).
21. a. Describe the basic format of an instruction, ensure to describe what each element in this format does. b. What are the RTN/Ls for the following MARIE instructions:a. Store Xb. Add Xc. Inputd. Halte. Skipcondf. Jump X c. Given the following memory values and a one-address machine with an accumulator: Word 10 contains 30 Word 20 contains 40 Word 30 contains 50 Word 40 contains 60 What values do the following instructions load into the accumulator? a. Load IMMEDIATE 10 b. Load DIRECT 10c. Load INDIRECT 10 d. Load IMMEDIATE 20 e. Load DIRECT 20 f. Load INDIRECT 20
Problem: Consider a processor with FOUR general purpose registers only. i. Draw block diagram of the processor with two internal buses. ii. List ALL operations ALU is able to perform iii. Write all control signals to perform all operations including those listed in part (ii) iv. Write control sequence for adding the content of the memory location whose address is at memory location pointed by immediate number NUM to register R1. Assume the number NUM is provided by control unit. v. List factors which contribute to generate control signals with at least on example of each factor
Consider the following store instruction: SW R1, 0x000F(R0). Assume that the registers R0 and R1 are initialized with 0x00000001 and 0x53A78BC Frespectively. A section of the MIPS byte addressable data memory is shown. Give the memory word of the following memory locations after the SW operation: (a). 0x00000015. (b). 0x00000014. (c). 0x00000013. (d) 0x00000012.(e). 0x00000011. (f). 0x00000010.
1. The hypothetical machine has two I/O instructions: 0011 = Load AC from I/O 0111 = Store AC to I/O In these cases, the 12-bit address identifies a particular I/O device. List the steps for every execution for the following program and illustrate using table that explain the process below : a. Load AC from device 5. b. Add contents of memory location 940. c. Store AC to device 6. d. Assume that the next value retrieved from device 5 is 3 and that location 940 contains a value of 2. Please pointing a, b,c ans. Because one I already upload this question and I didn't understand which one is and of a...please write ans a, b , c please