A computer has a 256 KHytes, 4-way set associative, write hack data cache with block size of 32 Bytes. The processor sends 32 bit addresses to the cache controller. Each cache tag directory entry contains, in addition to address tag, 2 valid bits, I modified bit and I replacement bit.

Systems Architecture
7th Edition
ISBN:9781305080195
Author:Stephen D. Burd
Publisher:Stephen D. Burd
Chapter6: System Integration And Performance
Section: Chapter Questions
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The number of bits intag field of address

A computer has a 256 KBytes, 4-way set
associative, write hack data cache with block size
of 32 Bytes. Thc processor sends 32 bit addresses
to the cache controller. Each cache tag directory
entry contains, in addition to address tag, 2 valid
bits, I modified bit and I replacement bit.
Transcribed Image Text:A computer has a 256 KBytes, 4-way set associative, write hack data cache with block size of 32 Bytes. Thc processor sends 32 bit addresses to the cache controller. Each cache tag directory entry contains, in addition to address tag, 2 valid bits, I modified bit and I replacement bit.
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