Virtua address sp= er page table entry imum size of addr

Systems Architecture
7th Edition
ISBN:9781305080195
Author:Stephen D. Burd
Publisher:Stephen D. Burd
Chapter4: Processor Technology And Architecture
Section: Chapter Questions
Problem 2PE: If a microprocessor has a cycle time of 0.5 nanoseconds, what’s the processor clock rate? If the...
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A computer system has a 36-bit virtual address space with a page
size of 8K bytes, and 4 bytes per page table entry. Assuming no
protection bits are used, the maximum size of addressable physical
memory in this system is
Transcribed Image Text:A computer system has a 36-bit virtual address space with a page size of 8K bytes, and 4 bytes per page table entry. Assuming no protection bits are used, the maximum size of addressable physical memory in this system is
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