(a) Draw the state transition diagram described by the VHDL of Figure Q4 (b) The VHDL of Figure Q4 is part of a digital system used to confirm the validity of a personal identification number, each keypress raising the KEYPRESS signal and placing the value of the key pressed on DATA. State the properties of a legal personal identification number. architecture behavior of confirm is type state is (COUNT, RELAX, REPORT); signal PRESENT_STATE: state; signal ISUM: UNSIGNED (3 downto 0) := "0000"; variable ICOUNT: UNSIGNED (3 downto 0) := "0000"; begin process (CLK, RESET) begin if RESET='0' then PRESENT_STATE <= COUNT; CONFIRM <= '0'; elsif (CLK'event and CLK='1') then CONFIRM <= '0'; case state is when COUNT => if KEYPRESS='1' then ICOUNT := ICOUNT + 1; ISUM <= ISUM + DATA; PRESENT_STATE <= RELAX; elsif VERIFY='1' then PRESENT_STATE <= REPORT; else PRESENT_STATE <= COUNT; end if; when RELAX => if KEYPRESS='1' then PRESENT_STATE <= RELAX; else end if; when REPORT => PRESENT_STATE <= COUNT; if (ISUM=1 and ICOUNT=4) then CONFIRM <='1'; end if; if VERIFY='1' then PRESENT_STATE <= REPORT; else PRESENT_STATE <= COUNT; ISUM <="0000"; ICOUNT :="0000"; end if; when others => PRESENT_STATE <= COUNT; CONFIRM <= 'O'; end case; end if; end process; end behavior; Figure Q4
(a) Draw the state transition diagram described by the VHDL of Figure Q4 (b) The VHDL of Figure Q4 is part of a digital system used to confirm the validity of a personal identification number, each keypress raising the KEYPRESS signal and placing the value of the key pressed on DATA. State the properties of a legal personal identification number. architecture behavior of confirm is type state is (COUNT, RELAX, REPORT); signal PRESENT_STATE: state; signal ISUM: UNSIGNED (3 downto 0) := "0000"; variable ICOUNT: UNSIGNED (3 downto 0) := "0000"; begin process (CLK, RESET) begin if RESET='0' then PRESENT_STATE <= COUNT; CONFIRM <= '0'; elsif (CLK'event and CLK='1') then CONFIRM <= '0'; case state is when COUNT => if KEYPRESS='1' then ICOUNT := ICOUNT + 1; ISUM <= ISUM + DATA; PRESENT_STATE <= RELAX; elsif VERIFY='1' then PRESENT_STATE <= REPORT; else PRESENT_STATE <= COUNT; end if; when RELAX => if KEYPRESS='1' then PRESENT_STATE <= RELAX; else end if; when REPORT => PRESENT_STATE <= COUNT; if (ISUM=1 and ICOUNT=4) then CONFIRM <='1'; end if; if VERIFY='1' then PRESENT_STATE <= REPORT; else PRESENT_STATE <= COUNT; ISUM <="0000"; ICOUNT :="0000"; end if; when others => PRESENT_STATE <= COUNT; CONFIRM <= 'O'; end case; end if; end process; end behavior; Figure Q4
Computer Networking: A Top-Down Approach (7th Edition)
7th Edition
ISBN:9780133594140
Author:James Kurose, Keith Ross
Publisher:James Kurose, Keith Ross
Chapter1: Computer Networks And The Internet
Section: Chapter Questions
Problem R1RQ: What is the difference between a host and an end system? List several different types of end...
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Transcribed Image Text:(a)
Draw the state transition diagram described by the VHDL of Figure Q4
(b)
The VHDL of Figure Q4 is part of a digital system used to confirm the
validity of a personal identification number, each keypress raising the
KEYPRESS signal and placing the value of the key pressed on DATA. State the
properties of a legal personal identification number.
architecture behavior of confirm is
type state is (COUNT, RELAX, REPORT);
signal PRESENT_STATE: state;
signal ISUM: UNSIGNED (3 downto 0) := "0000";
variable ICOUNT: UNSIGNED (3 downto 0) := "0000";
begin
process (CLK, RESET)
begin
if RESET='0' then
PRESENT_STATE <= COUNT; CONFIRM <= '0';
elsif (CLK'event and CLK='1') then
CONFIRM <= '0';
case state is
when COUNT =>
if KEYPRESS='1' then ICOUNT := ICOUNT + 1;
ISUM <= ISUM + DATA;
PRESENT_STATE <= RELAX;
elsif VERIFY='1' then PRESENT_STATE <= REPORT;
PRESENT_STATE <= COUNT;
else
end if;
when RELAX =>
if KEYPRESS='1' then PRESENT_STATE <= RELAX;
else
end if;
when REPORT =>
PRESENT_STATE <= COUNT;
if (ISUM=1 and ICOUNT=4) then CONFIRM <='1';
end if;
if VERIFY='1' then PRESENT_STATE <= REPORT;
else
PRESENT_STATE <= COUNT;
ISUM <="0000"; ICOUNT :="0000";
end if;
when others =>
PRESENT_STATE <= COUNT; CONFIRM <= '0';
end case;
end if;
end process;
end behavior;
Figure Q4
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