Compute speed metric for each processor for each benchmark normalized to processor 3. Then compute the geometric mean value for each system. Which processor is the slowest?
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- 1. Suppose you are developing a processor with an execution time of 960 ns, CPIof 1.61, and clock rate of 3 GHz. If the execution time is reduced by an additional 20%without affecting to the CPI and with a clock rate of 4 GHz, determine the number ofinstructions. 2. Determine the clock rate if the CPI is increased by 20% and the CPU time by15% while the number of instructions is unchangedPlease solve and show all work and steps. Consider three different processors P1, P2, and P3 executing the same instruction set. P1 has a 3 GHz clock rate and a CPI of 1.5. P2 has a 3 GHz clock rate and a CPI of 1.0. P3 has a 4.0 GHz clock rate and a CPI of 2.2. Which processor has the highest performance expressed in instructions per second? If the processors each execute a program in 15 seconds, find the number of cycles and the number of instructions?Assume for arithmetic, load/store, and branch instructions, a processor has CPIs for 1, 12, and 5respectively. Also assume that on a single processor a program requires the execution of 2.56*10^9arithmetic instructions, 1.28*10^9 load/store instructions, and 256 million branch instructions. Assumethat each processor has a 2GHz clock frequency. Assume that, as the program is parallelized to run overmultiple cores, the number of arithmetic and load/store instruction per processor is divided by 0.7xp(where p is the number of processors) but the number of branch instructions per processor remains thesame. a- Find the total execution time for the program on 1,2,4, and 8 processors, and show the relativespeedup of the 2,4, and 8 processor result relative to single processor result. b- If the CPI of the arithmetic instruction was doubled, what would be the impact be on theexecution time of the program on 1,2,4, and 8 processors? c- To what should the CPI of load/store instructions be…
- - Compilers can have a profound impact on the performance of an application.Assume that for a program, compiler A results in a dynamic instruction count of1.0 × 109 and has an execution time of 1.15 s, while compiler B results in adynamic instruction count of 1.2 × 109 and an execution time of 1.56 s.a) Find the average CPI for each program given that the processor has aclock cycle time of 1 ns.b) Assume the compiled programs run on two different processors. Ifthe execution times on the two processors are the same, how muchfaster is the clock of the processor running compiler As code versusthe clock of the processor running compiler B’s code?Assume for a given program, 60% of the executed instructionsare of Class A, 10% are of Class B, and 30% are of Class C. Furthermore,assume that an instruction in Class A requires 3 cycles, an instruction inClass B requires 2 cycles, and an instruction in Class C requires 2 tocomplete. i. Compute the overall CPI for this program.ii. Compute the clock rate of the CPU when the time it takes tocomplete 20 instructions is 1.73 ???????????The following table shows the number of instructions for a program with two sequences:Arith Store Load Branch Totala. 650 100 600 50 1400b. 750 250 500 500 2000Assuming that arith instructions take 1 cycle, load and store 5cycles, and branches 2 cycles, and the clock rate is 2 GHz processor.a. Which one is faster?b. Find the CPI for the sequence.b. If the number of load instructions can be reduced by one half,what is the speedup?
- Assume that each new generation of CPUs offers twice as many cores as the previous one does after every 18 months. How much extra off-chip memory bandwidth will be required for a CPU that will be introduced in three years if it is to achieve the same level of performance when measured on a per-core basis?computer architecture Assume that the operation times of one add instruction for the major functional units are 325 ps for memory access, 185 ps for ALU operations and 125 ps for register file read/writes. Please fill the table first and perform the following a )What is the total cycle in single-cycle implementation? b )What is the total cycle in pipelining implementation? c) What is the total cycle in pipelining implementation if there are 5 million add instructions? d) What is the total cycle in pipelining implementation for 5 million add instructions, if the stages are balanced? e)What is the speed up of pipelining implementation over single-cycle implementation?A certain microprocessor requires either 2, 4, 8, 12, or 16 machine cycles to perform various operations. A total of 17.5% of its instructions require 2 machine cycles, 12.5% require 4 machine cycles, 35% require 8 machine cycles, 20% require 12 machine cycles, and 15% require 16 machine cycles.Q) What is the clock rate (machine cycles per second) required for this microprocessor to be a “1 MIPS” processor?
- Consider three different processors P1, P2, and P3 executing the same instruction set. P1 has a 3 GHz clock rate and a CPI of 1.5. P2 has a 2.5 GHz clock rate and a CPI of 1.0. P3 has a 4.0 GHz clock rate and has a CPI of 2.2. a. Which processor has the highest performance expressed in instructions per second? b. If the processors each execute a program in 10 seconds, find the number of cycles and the number of instructions. c. We are trying to reduce the execution time by 30% but this leads to an increase of 20% in the CPI. What clock rate should we have to get this time reduction?A certain microprocessor requires either 2, 4, 8, 12, or 16 machine cycles to perform various operations. A total of 17.5% of its instructions require 2 machine cycles, 12.5% require 4 machine cycles, 35% require 8 machine cycles, 20% require 12 machine cycles, and 15% require 16 machine cycles.Q) Suppose this system requires an extra 16 machine cycles to retrieve an operand from memory. It has to go to memory 30% of the time. What is the average number of machine cycles per instruction for this microprocessor, including its memory fetch instructions?Q: Consider three different processors P1, P2, and P3 that support the same instruction set. P1 has a 3 GHz clock rate and a CPI of 1.5. P2 has a 2.5 GHz clock rate and a CPI of 1.0. P3 has a 4.0 GHz clock rate and has a CPI of 2.2. (a) Which processor has the highest performance expressed in instructions per second? Show your calculations. (b) If the processors each execute a program in 10 seconds, find the number of cycles and the number of instructions for each processor. (c) We are trying to reduce the execution time by 30% (i.e., execution time is reduced from 10 seconds to 7 seconds). However, this leads to an increase of 20% in the CPI. For each processor, what clock rate should we have to get this time reduction? (Show the calculations you did to answer this question.)