Assume that the components have the following latencies in picoseconds (ps). Component Latency in ps Mux (each) 20 ALU 130 Add (each) 50 Data memory 200 Instruction memory 150 What is the cycle time required for each instruction? a) load b) store c) add

Systems Architecture
7th Edition
ISBN:9781305080195
Author:Stephen D. Burd
Publisher:Stephen D. Burd
Chapter4: Processor Technology And Architecture
Section: Chapter Questions
Problem 2PE: If a microprocessor has a cycle time of 0.5 nanoseconds, what’s the processor clock rate? If the...
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Assume that the components have the following latencies in picoseconds (ps).
Component
Latency in ps
Mux (each)
20
ALU
130
Add (each)
50
Data memory
200
Instruction memory
150
What is the cycle time required for each instruction?
a) load
b) store
c) add
Transcribed Image Text:Assume that the components have the following latencies in picoseconds (ps). Component Latency in ps Mux (each) 20 ALU 130 Add (each) 50 Data memory 200 Instruction memory 150 What is the cycle time required for each instruction? a) load b) store c) add
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