Consider the architecture as shown and the following instruction: link a6, #-8 Internal bus CONTROL IR PC 0 12 4 Addr bus (to MEM) Y Select MAR mux MDR ALU Data bus (to/from MEM) Regs (A0-AN) Give the steps and control signals for implementing this instruction using the table on the next page. Include the instruction fetch. Efficiency will be part of your mark on this question. Comments are optional, but may increase part marks-register transfer notation can be a helpful comment in this case. Use ONLY the following control signals: IRin, PCin, PCout, Zin, Zout, Yin, MDRin, MDRout, ALUadd, ALUsub (subtract: bus value minus selected value), select Y, select 0, select 1, select 2, select 4, READ, WRITE, WMFC, END

Computer Networking: A Top-Down Approach (7th Edition)
7th Edition
ISBN:9780133594140
Author:James Kurose, Keith Ross
Publisher:James Kurose, Keith Ross
Chapter1: Computer Networks And The Internet
Section: Chapter Questions
Problem R1RQ: What is the difference between a host and an end system? List several different types of end...
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Give instructions
Consider the architecture as shown and the following
instruction:
link a6, #-8
Internal bus
CONTROL
IR
PC
0 12 4
Y
Addr bus
(to MEM)
Select
MAR
mux
MDR
ALU
Data bus
(to/from MEM)
Regs (A0-AN)
Give the steps and control signals for implementing this
instruction using the table on the next page. Include the
instruction fetch. Efficiency will be part of your mark on this
question. Comments are optional, but may increase part
marks-register transfer notation can be a helpful comment in
this case. Use ONLY the following control signals:
IRin, PCin, PCout, Zin, Zout, Yin, MDRIN, MDRout, ALUadd,
ALUsub (subtract: bus value minus selected value), select Y,
select 0, select 1, select 2, select 4, READ, WRITE, WMFC, END
Transcribed Image Text:Consider the architecture as shown and the following instruction: link a6, #-8 Internal bus CONTROL IR PC 0 12 4 Y Addr bus (to MEM) Select MAR mux MDR ALU Data bus (to/from MEM) Regs (A0-AN) Give the steps and control signals for implementing this instruction using the table on the next page. Include the instruction fetch. Efficiency will be part of your mark on this question. Comments are optional, but may increase part marks-register transfer notation can be a helpful comment in this case. Use ONLY the following control signals: IRin, PCin, PCout, Zin, Zout, Yin, MDRIN, MDRout, ALUadd, ALUsub (subtract: bus value minus selected value), select Y, select 0, select 1, select 2, select 4, READ, WRITE, WMFC, END
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