Consider the fragment of LEGV8 assembly below: Program1 STUR X16, [X6, #12] LDUR X16, [X6, #8] SUB X7, X5, X4 CBZ X7, Label ADD X5, X1, X4 SUB X5, X15, X4 Suppose we modify the pipeline so that it has only one memory (that handles both instructions and data). In this case, there will be a structural hazard every time a program needs to fetch an instruction during the same cycle in which another instruction accesses data. 1- Draw a pipeline diagram to show where the code above will stall. 2- In general, is it possible to reduce the number of stalls/ NOPs resulting from this structural hazard by reordering code (reordering the instructions)? 3- Must this structural hazard be handled in hardware? We have seen that data hazards can be eliminated by adding NOPs to the code. Can you do the same with this structural hazard? If so, explain how. If not, explain why not. 4- If we run the code above on a single-cycle computer, what kind of hazards are there? Student should write a justification for the answers.

Consider the fragment of LEGV8 assembly below: Program1 STUR X16, [X6, #12] LDUR X16, [X6, #8] SUB X7, X5, X4 CBZ X7, Label ADD X5, X1, X4 SUB X5, X15, X4 Suppose we modify the pipeline so that it has only one memory (that handles both instructions and data). In this case, there will be a structural hazard every time a program needs to fetch an instruction during the same cycle in which another instruction accesses data. 1- Draw a pipeline diagram to show where the code above will stall. 2- In general, is it possible to reduce the number of stalls/ NOPs resulting from this structural hazard by reordering code (reordering the instructions)? 3- Must this structural hazard be handled in hardware? We have seen that data hazards can be eliminated by adding NOPs to the code. Can you do the same with this structural hazard? If so, explain how. If not, explain why not. 4- If we run the code above on a single-cycle computer, what kind of hazards are there? Student should write a justification for the answers.

Database System Concepts

7th Edition

ISBN:9780078022159

Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan

Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan

Chapter1: Introduction

Section: Chapter Questions

Problem 1PE

See similar textbooks

Similar questions

Consider a 1GByte memory that can be managed by either a bitmap or a linked list. The memory allocation unit is in units of n bytes, which is some power of 2. Memory in the linked list is either marked as free or used (i.e. holes and segments). Assume that each node in the list requires 64 total bits (including a memory address, a length, and a pointer to the next linked list element). Also, make the (unrealistic) assumption that holes and segments are all 32KB (215 bytes) and that they alternate so that there is no coalescing of adjacent holes. It also means that each linked list element covers either a 32KB hole or a 32KB segment. Determine how much memory each data structure uses (the bitmap will be in terms of n)
Write an MPI program segment for all-to-all personalized broadcast on a ring of p processors, eachprocessor Pi, 0 ≤ i ≤ p − 1, holding M(i, 0), M(i, 1), ·M(i,(p − 1)). Message M(i, j), an integer, is destinedfrom Pi to Pj . Show only the p − 1 iterative loop. Ensure proper buffer size, MPI message size, howitems are organized and ordered at the destination buffer, etc., through each loop.
Consider a 32-bit computer with the MIPS assembly set, that executes the following code fragment loaded in memory in the address 0x0000000. li $t0, 1000 li $t1, 0 li $t2, 0 loop: addi $t1, $t1, 1 addi $t2, $t2, 4 beq $t1, $t0, loop This computer has a 4-way associative cache memory of 32 KB and lines of 16 bytes. Calculate the number of cache miss of the previous code, and the hit ratio, assuming that no other program is executing and that the cache memory is initially empty.
/* GCC *//* gcc -Wa,-adhln -g -masm=intel -m32 "Project 2.c" > "Project 2-g.asm" *//* gcc -Wa,-adhln -O -masm=intel -m32 "Project 2.c" > "Project 2-o.asm" */ #include <stdio.h> #define NOINLINE __attribute__ ((noinline)) static NOINLINE int function1(int x, int y){ int i;int sum;int values[10];sum = 0;for (i = 0; i < 10; i++) {values[i] = 10 * i + x * y;sum += values[i];} return (sum);} static int NOINLINE function2(int *values, int valuesLen){ int i;int sum; sum = 0;for (i = 0; i < valuesLen; i++) {sum += values[i];} return (sum);} static NOINLINE int function3(int x){ int y; y = x / 10;return (y);} static NOINLINE int function4(int a, int b, int c, int d){ int r; if (a > b)r = a;else if (a > c)r = 2 * a;else if (a > d)r = 3 * a;elser = -1;return (r);} int main(int argc, char **argv){ int i;int j;int k;int values[10]; i = 1;j = 2;k = function1(i, j);printf("function1: i = %d, j = %d, k = %d\n", i, j, k); for (i = 0; i < 10; i++) {values[i] = i;}k =…
/* GCC *//* gcc -Wa,-adhln -g -masm=intel -m32 "Project 2.c" > "Project 2-g.asm" *//* gcc -Wa,-adhln -O -masm=intel -m32 "Project 2.c" > "Project 2-o.asm" */ #include <stdio.h> #define NOINLINE __attribute__ ((noinline)) static NOINLINE int function1(int x, int y){ int i;int sum;int values[10];sum = 0;for (i = 0; i < 10; i++) {values[i] = 10 * i + x * y;sum += values[i];} return (sum);} static int NOINLINE function2(int *values, int valuesLen){ int i;int sum; sum = 0;for (i = 0; i < valuesLen; i++) {sum += values[i];} return (sum);} static NOINLINE int function3(int x){ int y; y = x / 10;return (y);} static NOINLINE int function4(int a, int b, int c, int d){ int r; if (a > b)r = a;else if (a > c)r = 2 * a;else if (a > d)r = 3 * a;elser = -1;return (r);} int main(int argc, char **argv){ int i;int j;int k;int values[10]; i = 1;j = 2;k = function1(i, j);printf("function1: i = %d, j = %d, k = %d\n", i, j, k); for (i = 0; i < 10; i++) {values[i] = i;}k =…
P is a set of processes. R is a set of resources. E is a set of request or assignment edges. The sets P, R, and E are as follows: P = {P1, P2, P3} R = {R1, R2, R3} E = {P1 -> R1, P2 -> R3, P3-> R2, R1 -> P2, R2 -> P2, R2 -> P1, R3 -> P3} R1 has one instance. R2 has two instances. R3 has one instance. a. Explain clearly with the help of a properly labelled diagram what is a resource allocation graph? Draw the resource-allocation graph for the given case also. b. Is there any deadlock in this situation? Explain your answer clearly.
P is a set of processes. R is a set of resources. E is a set of request or assignment edges. The sets P, R,and E are as follows:P = {P1, P2, P3}R = {R1, R2, R3}E = {P1 -> R1, P2 -> R3, P3-> R2, R1 -> P2, R2 -> P2, R2 -> P1, R3 -> P3}R1 has one instance. R2 has two instances. R3 has one instance.a. Explain clearly with the help of a properly labelled diagram what is a resource allocation graph?Draw the resource-allocation graph for the given case also. [2 + 1]b. Is there any deadlock in this situation? Explain your answer clearly.
Suppose that the virtual page reference stream contains repetitions of long sequences of page references followed occasionally by a random page reference. For example, the sequence: 0, 1, ... , 511, 431, 0, 1, ... , 511, 332, 0, 1, ... consists of repetitions of the sequence 0, 1, ... , 511 followed by a random reference to pages 431 and 332. (a) Why will the standard replacement algorithms (LRU, FIFO, clock) not be effective in handling this workload for a page allocation that is less than the sequence length? (b) If this program were allocated 500 page frames, describe a page replacement approach that would perform much better than the LRU, FIFO, or clock algorithms.
Consider Context Switch time of 2 secs and modify below program accordingly Program: FCFS CPU SCHEDULING ALGORITHM:#include<stdio.h>#include<conio.h>main(){int bt[20], wt[20], tat[20], i, n; float wtavg, tatavg;clrscr();printf("\nEnter the number of processes -- "); scanf("%d", &n); for(i=0;i<n;i++){printf("\nEnter Burst Time for Process %d -- ", i); scanf("%d", &bt[i]);}wt[0] = wtavg = 0; tat[0] = tatavg = bt[0]; for(i=1;i<n;i++){wt[i] = wt[i-1] +bt[i-1];tat[i] = tat[i-1] +bt[i]; wtavg = wtavg + wt[i]; tatavg = tatavg + tat[i];}printf("\t PROCESS \tBURST TIME \t WAITING TIME\t TURNAROUND TIME\n");for(i=0;i<n;i++){printf("\n\t P%d \t\t %d \t\t %d \t\t %d", i, bt[i], wt[i], tat[i]);}printf("\nAverage Waiting Time -- %f", wtavg/n);printf("\nAverage Turnaround Time -- %f", tatavg/n); getch();}
A hypothetical computer machine works with a 3-page frame for storage of process pages in the main memory. Assume that all the page frames are initially empty. Compute the total number of page faults and page hits that will occur while processing the page reference string using the optimal page replacement and LRU replacement algorithm.State which algorithm will provide a better result for the below mentioned string: 1 3 2 0 0 4 4 6 7 9 4 7 3 9 8 4 2 1 2 14 7 5 9 20 4 7 9 0 2
PROVIDE THE SOURCE CODE FOR LINUX C WITH OUTPUT Write a program to implement page replacement technique. Consider a reference string: 4, 7, 6, 1, 7, 6, 1, 2, 7, 2. the number of frames in the memory is 3. Find out the number of page faults respective to: a. Optimal Page Replacement Algorithm b. FIFO Page Replacement Algorithm c. LRU Page Replacement Algorithm
Consider a system with four page frames and a program that uses eight pages. Consider the reference string 0 1 7 2 0 3 1 7 0 1 7 and assume that all four page frames are initially empty. Consider the three following algorithms: a. Optimal page replacement b. FIFO page replacement c. LRU page replacement In each cases show a diagram (ASCII art recommended) that shows which pages are in which frames throughout time, and page faults at the bottom. For instance: would mean that at step 1 page 0 is referenced and loaded into frame 0, which is a page fault; then page 1 is referenced, and so on. The goal is to fill this table to see what in memory when and thus infer the number of page faults. The first 4 steps are ALWAYS the same, as above (i.e., just fill the four frames, with one page fault each time)