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Computer Networking: A Top-Down Approach (7th Edition)

7th Edition

ISBN:9780133594140

Author:James Kurose, Keith Ross

Publisher:James Kurose, Keith Ross

Chapter1: Computer Networks And The Internet

Section: Chapter Questions

Problem R1RQ: What is the difference between a host and an end system? List several different types of end...

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a. We are given a system with 2 levels of cache, L1 and L2. The CPU directly interfaces to the L1 cache, which has a hit time of 1 ns and a hit rate of 0.4. On misses, the L1 accesses the L2 cache, which has an access time of 20 ns, and a hit rate of 0.8. If the L2 misses, it accesses the main memory, which has an access time of 100 ns. Determine the average memory access time, of the CPU to the memory hierarchy.
b. A cache is inserted between the main memory, which is 32 MB, and the CPU. This cache can accomodate 64 blocks and each block can accomodate 128 words (2B per word). How many possible blocks can be stored in one cache block if it is a direct-mapped cache?

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