Example 4.7 Find v, in Fig. 4.20 using source transformation. Solution: The circuit in Fig. 4.20 involves a voltage-controlled dependent current source. We transform this dependent current source as well as the 6-V 0.25v independent voltage source as shown in Fig. 4.21(a). The 18-V voltage source is not transformed because it is not connected in series with any resistor. The two 2-N resistors in parallel combine to give a 1-N resistor, which is in parallel with the 3-A current source. The current source is transformed to a voltage source as shown in Fig. 4.21(b). Notice that the terminals for Uy are intact. Applying KVL around the loop in Fig. 4.21(b) gives 6 V 18 V Figure 4.20 For Example 4.7. -3 + 5i + vx + 18 = 0 (4.7.1)

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Example 4.7
Find v, in Fig. 4.20 using source transformation.
Solution:
The circuit in Fig. 4.20 involves a voltage-controlled dependent current
source. We transform this dependent current source as well as the 6-V
0.25v
independent voltage source as shown in Fig. 4.21(a). The 18-V voltage
source is not transformed because it is not connected in series with any
resistor. The two 2-N resistors in parallel combine to give a 1-N
resistor, which is in parallel with the 3-A current source. The current
source is transformed to a voltage source as shown in Fig. 4.21(b).
Notice that the terminals for Uy are intact. Applying KVL around the
loop in Fig. 4.21(b) gives
6 V
18 V
Figure 4.20
For Example 4.7.
-3 + 5i + vx + 18 = 0
(4.7.1)
Transcribed Image Text:Example 4.7 Find v, in Fig. 4.20 using source transformation. Solution: The circuit in Fig. 4.20 involves a voltage-controlled dependent current source. We transform this dependent current source as well as the 6-V 0.25v independent voltage source as shown in Fig. 4.21(a). The 18-V voltage source is not transformed because it is not connected in series with any resistor. The two 2-N resistors in parallel combine to give a 1-N resistor, which is in parallel with the 3-A current source. The current source is transformed to a voltage source as shown in Fig. 4.21(b). Notice that the terminals for Uy are intact. Applying KVL around the loop in Fig. 4.21(b) gives 6 V 18 V Figure 4.20 For Example 4.7. -3 + 5i + vx + 18 = 0 (4.7.1)
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