I need you to design a digital logic circuit as a read only memory (ROM) [Decoder + OR gates]. A ROM accepts a three–bit number (x2 x1 x0) and generates an output binary number equal to the input squared + 2. Here is the equation: A = x2 + 2, with input (x) : 0 ≤ (x) ≤ 7 (a) Try to set–up the truth–table [Binary inputs: (x); Binary outputs: ..., A2, A1, A0] (b) What is the size of the initial (unsimplified) ROM ? (c) What is the size of the final (simplified) ROM ?

Database System Concepts
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Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
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I need you to design a digital logic circuit as a read only memory (ROM) [Decoder + OR gates]. A ROM accepts a three–bit number (x2 x1 x0) and generates an output binary number equal to the input squared + 2.

Here is the equation: A = x2 + 2, with input (x) : 0 ≤ (x) ≤ 7

(a) Try to set–up the truth–table [Binary inputs: (x); Binary outputs: ..., A2, A1, A0]

(b) What is the size of the initial (unsimplified) ROM ?

(c) What is the size of the final (simplified) ROM ?

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