Explain the statement.
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- There is no correlation between the smaller instruction set and the higher performance achieved by RISC architecture due to its overlapping register windows. justification of the assertionThe overlapping register windows are responsible for the RISC architecture's superior performance; the smaller instruction set has no bearing on this. Justification of the assertionBriefly explain the two basic approaches used to minimize register-memoryoperations on RISC machines.
- Consider relative comparison of the features/properties of CISC and RISC Machines, fill the following table (write only Low or High where appropriate)High speed in RISC architecture is due to overlapping register windows rather than the reduced instruction set. Purpose of the Claim and ExplanationA RISC instruction pipeline has five stages with propagation delays of 20 ns, 25 ns, 20ns, 70 ns, and 40 ns, respectively. What is the clock period? If a non-pipelined CPU can process an instruction in 160 ns, what is the actual steady-state speedup of the pipeline?
- The excellent performance of the RISC architecture is due to the overlapping register windows; it is unrelated to the reduced instruction set. Justification for the assertionThe excellent performance of RISC architecture is due to the overlapping register windows; the smaller instruction set has no influence on this. Justification for the claimHigh speed in RISC architecture is due to overlapping register windows rather than the reduced instruction set. Rationale for the Argument
- High speed in RISC architecture is due to overlapping register windows rather than the reduced instruction set. Justification of the assertionRISC architecture compromises on number of instruction implemented in instruction set and reply more on programming for complex instruction. How still it completes with CISC?1. Consider a pipelined RISC CPU with 11 stages. What is maximum speedup of this CPU over a non-pipelined implementation? 2. Given a 5-bit Global Branch History Buffer, how many Branch History Tables do we need?