numbers in a form used in computers (positive The circuit shown in Figure 02 is a 4-bit circuit that can add or subtra numbers in true form; negative numbers in complement form). (a) Explain what happens when the Add/Subt. input is HIGH. (b) What happens when Add/Subt. is LOW? Q.5 A| B1 A, Bo Az B3 A, B2 Add/Subt. O A B Cin A B Cin A B Cin A B Cin Σ Cout Σ Cout Σ Cout Cout Σ FIGURE 02
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- A(n) _____ operation transforms a 0 bit value to 1 and a 1 bit value to 0.A Gray code is a sequence of binary numbers with the property that no more than 1 bit changes in going from one element of the sequence to another. For example, here is a 3-bit binary Gray code: 000, 001, 011, 010, 110, 111, 101, and 100. Using three D flip-flops and a PLA, construct a 3-bit Gray code counter that has two inputs: reset, which sets the counter to 000, and inc, which makes the counter go to the next value in the sequence. Note that the code is cyclic, so that the value after 100 in the sequence is 000.Build a circuit that takes four bits as input: W, X, Y, Z. Treat WX as a 2-bit unsigned binary number, and treat YZ as a second 2-bit unsigned binary number. Your circuit should generate the output corresponding to the product of WX and YZ. You will need 4 bits of output for this problem.For example, if your input was 1011, your inputs correspond to 2 and 3. That product is 6, so your output will be 0110.Create a truth table for this problem, show all k-maps and minimizations, and build the corresponding (minimized) circuit. Use XOR, XNOR, NAND, and NOR as appropriate if it reduces the number of gates used.
- Based on the following image answer the following questions; a. Write a boolean algebra expression for each of Q0, Q1, Q2, and Q3: b. Draw a circuit that produces each of the functions from a single set of inputs A1 and A0: c. Each input combination of A1 and A0 represents a 2-bit binary number. How is this related to the outputs?If the floating-point number representation on a certain system has a sign bit, a 3-bitexponent and a 4-bit significand: • What is the largest positive and the smallest positive number that can be stored on this?system if the storage is normalized? (Assume no bits are implied, there is no biasing,exponents use two's complement notation, and exponents of all zeros and all ones areallowed.)• What bias should be used in the exponent if we prefer all exponents to be non-negative?Why would you choose this bias? show work and write out solutionA 16-bit register in a computer contains 0011 1000 0101 0111. What does its contentsrepresent if it contains d) a 4-digit hexadecimal number (express your answer as a decimal number),e) a 16-bit signed binary number (express your answer as a decimal number),f) two characters in an odd parity ASCII code (the parity bit is on the left)?
- If the floating-point number representation on a certain system has a sign bit, a 3-bit exponent and a 4-bit significand: What is the largest positive and the smallest positive number that can be stored on this system if the storage is normalized? (Assume no bits are implied, there is no biasing, exponents use two's complement notation, and exponents of all zeros and all ones are allowed.) What bias should be used in the exponent if we prefer all exponents to be non-negative? Why would you choose this bias?. Implement a circuit for the following problem using Logisim. The input to the circuit are 3 4-bit numbers, A,B,C. The sum of A and B is subtracted from C. The difference (result of subtraction) is compared with A. The circuit has 3 outputs lines depending on comparison. Use appropriate chips in Logisim for the operations mentioned Answer step by stepShow how the unsigned serial multiplication method would compute M × Q where M = 10110 and Q = 01101. M and Q are unsigned numbers. For each step, describe in words what is happening (shift left, shift right, add/subtract M or Q into product, set a bit, etc.), and showthe product (or partial product) for that step. (Note: Q is the multiplier and M is the multiplicand
- What is the size of my multiplier if I want a maximum output of 6-bits? create a diagramWe are provided an FP prototype labeled: IEEE 754-2015 of 15 bits similar to IEEE 754, where the exponent has size 6 bits and fraction has size 8 bits, and 1 MSB for the sign. No guard or round bits are assumed. What is the bias of the system? Find the smallest and largest number that can be represented. Find the new representation of the decimal number you worked with earlier (e.g., the 0.012).design the following circuits, for 4 bit binary input(0000-1111): ● a circuit that can detect prime numbers ● a circuit that can detect fibonacci numbers ● a circuit that can detect tribonacci numbers ● a circuit to detect catalan numbers between 0-15