OR A. A. B. OR (a, buy) Follow the same steps, but use the gates, and each gate has its own table for the following gates: snput a, b's 1_NAND 2_NOR 3_XOR out put y's assi gn y= al OR end modale
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- Given a 4-bit signed integer, design a circuit that outputs its absolute value. You can assume that the input will always have a valid output. (a) Draw a logic diagram of this circuit. You may use 4-bit half adder(s), 2x1 4-bit multiplexer(s), and any logic gate(s) in your design. (b) With the following Verilog code, implement your design above in Verilog. module half_adder (input [3:0] a, input [3:0] b, output [3:0] s); assign s = a + b; endmodule module mux(input [3:0] D0, input [3:0] D1, input S, output reg [3:0] O); always @(*) begin if (S == 0) O = D0; else if (S == 1) O = D1; else O = 4’bx; end endmoduleDraw a circuit that implements a 3-bit Adder that takes two 3-bit numbers as input, each on 3 input lines and outputs a 4 bit number on 4 output lines. You may use the Half Adder, the Full Adder and the following gates: NOT, AND, OR, XOR. Make sure to clearly label the interface wires on your diagram and the types of gates you use.4 bit 2’s Complement Multiplier INPUT A: 4 bit 2’s Complement number INPUT B: 4 bit 2’s Complement number OUTPUT: the product of A x B represented as a 8 bit 2’s Complement number You are only allowed to use the basic gates: NOT, AND, OR, XOR. You may however, use these basic gates to build your own custom circuits (i.e. Adder). You are NOT ALLOWED to use Logisim’s built in circuits. Each custom circuit is to be implemented as a sub-circuit as discussed in class. PART 4: Using the 3 subcircuits you built in Parts 1-3, built a 4 bit 2’s Complement multiplier that uses the inversion method discussed in class. Name this circuit: SignedMultiplier HINTS: INVERSION METHOD: 1) If input A is negative, invert it. If input A is positive, leave it alone. 2) If input B is negative, invert it. If input B is positive, leave it alone. 3) Multiply A and B. 4) If both A and B originally had the same sign (both positive or both negative), do nothing. 5) If A and B originally had different signs…
- 4 bit 2’s Complement Multiplier INPUT A: 4 bit 2’s Complement number INPUT B: 4 bit 2’s Complement number OUTPUT: the product of A x B represented as a 8 bit 2’s Complement number You are only allowed to use the basic gates: NOT, AND, OR, XOR. You may however, use these basic gates to build your own custom circuits (i.e. Adder). You are NOT ALLOWED to use Logisim’s built in circuits. Each custom circuit is to be implemented as a sub-circuit as discussed in class. PART 1: Build a 4 bit controlled 2’s Complement Inverter as a subcircuit named 4BitInverter PART 2: Build a 8 bit controlled 2’s Complement Inverter as a subcircuit named 8BitInverter PART 3: Build a 4 Bit UNSIGNED Multiplier as a subcircuit named UnsignedMultiplier PART 4: Using the 3 subcircuits you built in Parts 1-3, built a 4 bit 2’s Complement multiplier that uses the inversion method discussed in class. Name this circuit: SignedMultiplier HINTS: INVERSION METHOD: 1) If input A is negative, invert it. If input A…4 bit 2’s Complement Multiplier INPUT A: 4 bit 2’s Complement number INPUT B: 4 bit 2’s Complement number OUTPUT: the product of A x B represented as a 8 bit 2’s Complement number You are only allowed to use the basic gates: NOT, AND, OR, XOR. You may however, use these basic gates to build your own custom circuits (i.e. Adder). You are NOT ALLOWED to use Logisim’s built in circuits. Each custom circuit is to be implemented as a sub-circuit as discussed in class. PART 1: Build a 4 bit controlled 2’s Complement Inverter as a subcircuit named 4BitInverter1a. Draw a circuit diagram using appropriate logic gates to implement a 3-bit comparator. Identifythe gates used in implementation and show its usage to compare two 3-bit words by writing thetruth table. b. Write the Boolean expression for the following 4 input circuit. Include sub-expressions foroutputs of each gate. c. Complete a truth table for the previous logic gate circuit in part b. d. Write the Boolean expression for the new circuit below. Then, simplify the following logic circuitusing the theorems in Boolean algebra. Show the steps clearly and specify the law used in eachstep. Finally draw the simplified circuit diagram.
- Design a combinational logic circuit that takes a 3–bit input and has one output P. The P output should be active high only when the inputs corresponds to a prime number Note: the prime numbers: Prime numbers are 2, 3, 5, 7… Select one: a. P= AC+B b. P= A'C+A'B c. P= AC+A'B d. P= AC+A'B'a) Implement the following Logic Circuit using C++. A, B, C, and D are the input bits while F is the output bit function. Truth Table : (Write a python program for the following below) You must produce all seven truth tables (AND, OR, NOT, XOR, NAND, NOR and XNOR) and an eight truth table for (A ∨ B) ꚛ C = Q, using the gates logic from the Python Logic Code: AND, OR, NOT & XOR Assignment. Each gate must be a function. The output should look like this:
- Write the three outputs of X, Y and Z in terms of the four inputs A, B, C and D for the follow logic gates configuration ---This is my answer: I am unsure if it is right. X = A + (A’B’ * (B’+C’) = A + (A’+B’)*(B’*C’) Y = ((A’+B’)*(B’*C’))*((B’*C’)+CD)Z = (B+C)*(C’+D’)*D’SR latch is one of the simplest sequential circuits, which is composed of two cross-coupled NOR gates, as shown below. Select all TRUE statements. a If R = 1 and S = 1, Both NOR gates produce the FALSE outputs. That is an invalid state. b If R = 0 and S = 0, this circuit will remember the previous value (or state) Q and Q_complement. c If R = 0 and S = 1, it produces a TRUE output on Q. d If R = 1 and S = 0, it produces a FALSE output on Q.Draw unsimplified circuits to implement the following Boolean expressions. Use many-input AND, OR, NOR, or NAND gates where they are useful (instead of using only 2-input gates).