Problems: (Σ - upper case sigma and II - upper case pi) 1. a. Draw the waveforms for f(x.y.z)-II M(0,1.4.6) and g(x,y,z) - E m(1.3.4.5.6) in the timing diagram below. (Right click on the image, save it, print it out, and paste/tape it in your homework). b... C. ( Draw a NAND-NAND network f(x,y,z) = II M(0,1,4,6) (Hint: simplify first) Draw a NOR-NOR network g(x,y,z) = m(1.3.4.5.6) (Hint: simplify first)

Database System Concepts
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Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
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Problems: (= upper case sigma and II = upper case pi)
1.
a.
=
Draw the waveforms for f(x.y.z) - II M(0,1.4.6) and g(x,y,z) - E m(1,3,4,5,6) in the timing diagram below.
(Right click on the image, save it, print it out, and paste/tape it in your homework).
d!
.!
1:
b...
a.
b.
Draw a NAND-NAND network f(x,y,z) = II M(0,1,4,6) (Hint: simplify first)
Draw a NOR-NOR network g(x,y,z) - Σ m(1.3.4.5.6) (Hint: simplify first)
=
C. (
2. Implement the function f(a.b.c) - Σm(1.3.4.6.7)
using a 4-to-1 multiplexer and as few inverters as possible, and
using a 2-to-1 multiplexer and as few additional gates as possible.
3. Implement the function f(a,b,c,d) = m(0,1,3,4,5,7,9,10,11,13)
a.
b.
using an 8-to-1 multiplexer and as few inverters as possible, and
, using a 4-to-1 multiplexer and as few additional gates as possible.
Transcribed Image Text:Problems: (= upper case sigma and II = upper case pi) 1. a. = Draw the waveforms for f(x.y.z) - II M(0,1.4.6) and g(x,y,z) - E m(1,3,4,5,6) in the timing diagram below. (Right click on the image, save it, print it out, and paste/tape it in your homework). d! .! 1: b... a. b. Draw a NAND-NAND network f(x,y,z) = II M(0,1,4,6) (Hint: simplify first) Draw a NOR-NOR network g(x,y,z) - Σ m(1.3.4.5.6) (Hint: simplify first) = C. ( 2. Implement the function f(a.b.c) - Σm(1.3.4.6.7) using a 4-to-1 multiplexer and as few inverters as possible, and using a 2-to-1 multiplexer and as few additional gates as possible. 3. Implement the function f(a,b,c,d) = m(0,1,3,4,5,7,9,10,11,13) a. b. using an 8-to-1 multiplexer and as few inverters as possible, and , using a 4-to-1 multiplexer and as few additional gates as possible.
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