Q2. [Consider a 48-bit virtual address space. The system uses a page size of 4KBand two-level hierarchical paging. Therefore, the page table is divided into 4KB pages and thelogical address has the following format:P1a) [Below are the relevant tables. The values are provided in hexadecimal.Outer Page TablePage A of Page Table0Page A of PT0FEE113BCX124C3D(rest are invalid)Page B of PT(rest are invalid)Size of P1 =00000000000023XWhat is the size (number of bits) of each of the following logical address fields:bits000003003102P2000001002777Size of P2 =Size of Offset=b)what is the physical/logical address corresponding to each of the followingshown logical/physical addresses. Answer "Bad logical address" if the logical address isinvalid.Logical AddressbitsOffsetbitsPage B of the Page Table0330144B2E55X(rest are invalid)Physical Address44B3BC

Q2. [ Consider a 48-bit virtual address space. The system uses a page size of 4KB and two-level hierarchical paging. Therefore, the page table is divided into 4KB pages and the logical address has the following format: P1 a) [ Below are the relevant tables. The values are provided in hexadecimal. Outer Page Table Page A of Page Table 0 Page A of PT 0 FEE 1 Page B of PT 1 3BC X (rest are invalid) Size of P1 = 000000000000 P2 2 3 X 000003003102 000001002777 What is the size (number of bits) of each of the following logical address fields: bits bits Offset 124 C3D (rest are invalid) Size of P2 = Size of Offset= b) In what is the physical/logical address corresponding to each of the following shown logical/physical addresses. Answer "Bad logical address" if the logical address is invalid. Logical Address bits Page B of the Page Table 0 330 1 44B 2 X Physical Address 44B3BC E55 (rest are invalid)

Q2. [ Consider a 48-bit virtual address space. The system uses a page size of 4KB and two-level hierarchical paging. Therefore, the page table is divided into 4KB pages and the logical address has the following format: P1 a) [ Below are the relevant tables. The values are provided in hexadecimal. Outer Page Table Page A of Page Table 0 Page A of PT 0 FEE 1 Page B of PT 1 3BC X (rest are invalid) Size of P1 = 000000000000 P2 2 3 X 000003003102 000001002777 What is the size (number of bits) of each of the following logical address fields: bits bits Offset 124 C3D (rest are invalid) Size of P2 = Size of Offset= b) In what is the physical/logical address corresponding to each of the following shown logical/physical addresses. Answer "Bad logical address" if the logical address is invalid. Logical Address bits Page B of the Page Table 0 330 1 44B 2 X Physical Address 44B3BC E55 (rest are invalid)

Database System Concepts

7th Edition

ISBN:9780078022159

Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan

Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan

Chapter1: Introduction

Section: Chapter Questions

Problem 1PE

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) Consider the following sequence of virtual memory references (in decimal) generatedby a single program in a pure paging system:100, 110, 1400, 1700, 703, 3090, 1850, 2405, 2460, 4304, 4580, 3640a. Derive the corresponding reference string of pages (i.e. the pages the virtual addressesare located on), assuming a page size of 1024 bytes. (Assume that page numberingstarts at 0)b. For the page sequence derived above, determine the number of page faults for each ofthe following page replacement strategies, assuming that two (2) page frames areavailable to the program.i. LRUii. FIFOiii. OPT (Optimal)
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I have a 128-bit computer where addresses are 128 bits wide. I want to implement virtual memory with paging for this computer, and I want to use a page size of 4KB. I will design it so that a page table consumes exactly one page. How many page table entries (PTEs) fit within a page?
Suppose we have a byte-addressable computer using direct mapping with 16-bit main memory addresses and 32 blocks of cache. If each block contains 16 bytes. a. Determine the number of bits of the offset field. b. Determine the number of bits of the block (or slot) field. c. Determine the number of bits of the tag field. d. To which cache block would the hexadecimal address 0x2468 map? e. What is the tag of the hexadecimal address 0x2468 f.To which cache block would the hexadecimal address 0x864A map? g. What is the tag of the hexadecimal address 0x864A?