Q3| EVALUATIONS: Memory at address 0x00100250 contains the following 16 bytes of data: 00100250 58 89 02 10 00 01 23 45 67 ab cd ef 00 01 10 11 Q3.1 Show the contents of the %eax register after execution of these instructions: movl Ox00100250, secx 4 (%ecx), %eax movl Seax = Q3.2 Show the hex value of the seax register and state of the specified condition flags wwww after executing the instruction. .text xor! seax seax Seax = CF SF ZF OF Q3.3 Write another assembly language instruction (not using the xor instruction) that will get the same result as above. II II II
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- 1. T/F - if (B)=006000 (PC)=003600 (X)=000090, for the machine instruction 0x032026, the target address is 003000.2. T/F – PC register stores the return address for subroutine jump.3. T/F – S register contains a variety of information such as condition code.4. T/F – INPUT WORD 1034 – This means Operating system should reserve 1034 bytes in memory5. T/F - In a two pass assembler, adding literals to literal table and address resolution of local symbol are done using first pass and second pass respectively.Convert given code to LEGv8 code:int f, g, y //global 64-bit variablesint sum (int a, int b) { // at memory address X0+1000.return (a +b)} int main (void) // at memory address X0 + 800{f=2;g=3;y= sum (f, g);return y;}Convert this code, making valid assumptions about registers and register use. Notethat brackets and global variable declarations are not affecting the addresses of the instructionsin memory.Microprocessors I need EMU8086 - MICROPROCESSOR EMULATOR code to run all given tasks below Task 01Swap two numbers using ADD/SUB instructions only.Task 02If A, B and C are 3 variables, perform the given mathematical operation • A = C + (B – A) - 2 ;Task 03If X, Y and Z are 3 variables, then perform the given mathematical operation• Y * Y / (4 * X * Z)Task 04Perform the following arithmetic operation: 10 * 7 / (1 - 4) + 13 + 52 – 4 *
- instruction is in the first picture please give me only implementation of int L1lookup(u_int32_t address) and int L2lookup(u_int32_t address) cacheSim.h #include<stdlib.h>#include<stdio.h>#define DRAM_SIZE 1048576typedef struct cb_struct {unsigned char data[16]; // One cache block is 16 bytes.u_int32_t tag;u_int32_t timeStamp; /// This is used to determine what to evict. You can update the timestamp using cycles.}cacheBlock;typedef struct access {int readWrite; // 0 for read, 1 for writeu_int32_t address;u_int32_t data; // If this is a read access, value here is 0}cacheAccess;// This is our dummy DRAM. You can initialize this in anyway you want to test.unsigned char * DRAM;cacheBlock L1_cache[2][2]; // Our 2-way, 64 byte cachecacheBlock L2_cache[4][4]; // Our 4-way, 256 byte cache// Trace points to a series of cache accesses.FILE *trace;long cycles;void init_DRAM();// This function print the content of the cache in the following format for an N-way cache with M Sets// Set 0…Q1- Write a program in assembly language for the 8085 microprocessor to send one byte of data located at the memory address (3000H ) using SOD at a baud rate of 1200. Information: The 8085 processor operates at a frequency of 3.072 MHz . When sending the required byte, you must adhere to the following: The two high bits of the start bits(1 1) must be sent, after that the data bits are sent, after that the low bit of the stop bit (0) is sent. The following flowchart will help you. The solution must be integrated and include the calculation of the baudrate delay timePlease solve Q) which is a valid offset pair? A) DS:DI C) ES:SI B) CS:SP D) SS:BP Q) The number of General Purpose Registers present in 8086 microprocessor? 6 10 34 4 Q) With 20-bit address lines memory size of microprocessor would be? Q) Calculate the physical address of the segment offset pair 7213:5686 77686H 0C899H 777B9H 777B6H Q) ALU of 8086 is 20 bit 8 bit 16 bit 32 bit Q) Memory size of 8086 microprocessor is 4KB 256 bytes 128bytes 1MB Q) In 8086 data access by which register uses SS as the default segment register? Both SP and BP SP Dl BP Q) Flag resister is None of the above 20 bit 16 bit 8 bit Q) The starting address of the segment is called None of the above Effective address Base address Offset address Q) Instruction queue size in 8086 is 4 bytes 4 bits 6 bytes 6 bits Q) MOV CX, [481d] ; assuming DS= 2162H, logical address will be: Q) AL= 53 CL=29 ADD AL, CL DAA What is the value of AL after…
- Consider the following instruction:Instruction: Add Rd, Rs, RtInterperation: Reg[Rd] = Reg[Rs] + Reg[Rt] RegWrite MemRead ALUMux MemWrite ALUOp RegMux Branch a, What are the values of control signals generated by the control in Figure 4.2 for the above instruction? b, Which resources (blocks) perform a useful function for this instruction? c, Which resources (blocks) produce outputs, but their outputs are not used for this instruction? d, which resources (blocks) produce no output for this instruction?QUESTION ONE (1) 1. The hypothetical machine has two I/O instructions: 0011 = Load AC from I/O 0111 = Store AC to I/O In these cases, the 12-bit address identifies a particular I/O device. List the steps for every execution for the following program and illustrate using table that explain the process below : a. Load AC from device 5. b. Add contents of memory location 940. c. Store AC to device 6. d. Assume that the next value retrieved from device 5 is 3 and that location 940 contains a value of 2.In the Intel 8086 microprocessor, suppose the register AX contains the data 35AB H. What will be the contents of AX after executing the following programs? Assume that the initial content on the Carry Flag (CF) is one for all the calculations. You MUST clearly show ALL your steps in obtaining your final result for getting full and/or partial credit. Please present your final result in Hexadecimal format. (a) MOV CL,04H SHR AX,CL RET (b) MOV CL,04H RCR AX,CL RET
- 1. The hypothetical machine has two I/O instructions: 0011 = Load AC from I/O 0111 = Store AC to I/O In these cases, the 12-bit address identifies a particular I/O device. List the steps for every execution for the following program and illustrate using table that explain the process below : a. Load AC from device 5. b. Add contents of memory location 940. c. Store AC to device 6. d. Assume that the next value retrieved from device 5 is 3 and that location 940 contains a value of 2. Please pointing a, b,c ans. Because one I already upload this question and I didn't understand which one is and of a...please write ans a, b , c please10.- Consider the following code and pictureLoop1MOVLW 0x32MOVWF REG2DECFSZ REG2,FGOTO LOOP1 If the system clock frequency is aMHz and each machine cycle consumes 4 cycles of it. Calculate the delay time of the LOOP1 loop. Include the execution difference time of the DECFSZ instruction in the last cycle. Select an answerA) 0.6.sB) 6msC)6usD) 60usWill upvote! Find the memory address of the next instruction executed by the microprocessor, when operated in the real mode, for the following CS:IP and 80286 register combinations: a. DS=2F2E & DX=9D64 b. CS=9F7A & IP=AB27 c. ES=DE21 & DI=D75F d. SS=FF5C & BP=92B8 e. DS=DC67 & CX=2FE8