The Adder/Subtractor includes a “switch" which is a set of multiplexors. Assume registers A and B are 32-bits each. a. What is the size of each MUX (number of inputs, number of selector bits). b. How many MUXes are needed? c. How many total selector bits are sent to the adder/subtractor?

A+ Guide To It Technical Support
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Chapter3: Supporting Processors And Upgrading Memory
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Problem 10TC: If 2 bits of a byte are in error when the byte is read from ECC memory, can ECC detect the error?...
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I got 2 inputs and 1 selector bit for A, but dont understand how I would get B or C

The Adder/Subtractor includes a "switch" which is a set of multiplexors. Assume registers A
and B are 32-bits each.
a. What is the size of each MUX (number of inputs, number of selector bits).
b. How many MUXes are needed?
c. How many total selector bits are sent to the adder/subtractor?
Transcribed Image Text:The Adder/Subtractor includes a "switch" which is a set of multiplexors. Assume registers A and B are 32-bits each. a. What is the size of each MUX (number of inputs, number of selector bits). b. How many MUXes are needed? c. How many total selector bits are sent to the adder/subtractor?
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