The Kiwi™ memory architecture design team has a dilemma. The team is considering several different memory configuration variations for an upcoming machine design. Consider the following designs (All memory accesses are in terms of bytes, and all are using paging techniques):
The Kiwi™ memory architecture design team has a dilemma. The team is considering several different memory configuration variations for an upcoming machine design. Consider the following designs (All memory accesses are in terms of bytes, and all are using paging techniques):
Chapter4: Processor Technology And Architecture
Section: Chapter Questions
Problem 4PE
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The Kiwi™ memory
Characteristic |
Design 1 |
Design 2 |
Design 3 |
Physical Memory Address Width |
8 bit |
16 bit |
32 bit |
Logical Address Width |
12 bit |
20 bit |
24 bit |
Page/Frame size in bytes |
16 bytes |
32 bytes |
64 bytes |
Page Table Type |
Single |
Single |
Double |
a) For each design, list the maximum number of pages each process can access in logical address space.
b) For each design, list the maximum number of frames in physical memory.
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