Your goal is to translate the following C function to assembly by filling in the missing code below. To begin, first run this program-it will fall to return the required data to the test code. Next, write code based on the instructions below until running it produces correct. 1 void accessing memory ex 1(void) { 2 memory address 0x10040x5678; 3) Data This allocates space for data at address Ox1004 To make it testable, it's also given a name section bss address(ec1004) memory address ex1004: space 2 global memory address 0x3004 Code accessing nenory_ex_11 -global accessing y Witte a short snippet of assembly code places the value Ox5678 in memory location Ox1004, then returns to the calling test function
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- You are responsible to write an assembly function to perform searching of a list of names in stored in ascending order. This function will use the linear search algorithm. The names could be stored in mixed case. Therefore your assembly function must do the comparison in a case insensitive manner. This function will use the C function signature but everything within this function should be assembly code using the ASM block similar to the assembly example shown in class. long search_by_name (char* list, long count, char* token); list – the starting address of the list of structures to be searched count – total number of names in the list token – name to be search in the list long search_by_name (char* list, long count, char* token) { long index = 0; /* Replace the following C code with the ASM block */ // x86-64, in-line assembly struct student *clist = (struct student*)list; for (index = 0; index < count; index++) if ( strcasecmp( clist[index].name, token ) == 0) return…[Note: You are allowed to use only instructions implemented by the actual MIPS hardwareprovided in attached photos below. Use assembly language format from the references orthe book. Note, base ten numbers are listed as normal (e.g. 23), binary numbers areprefixed with 0b and hexadecimal numbers are prefixed with 0x.] Write a C program and corresponding assembly program based on MIPS ISA that reads three edges for a triangle and computes the perimeter if the input is valid. Otherwise, display that the input is invalid. The input is valid if the sum of every pair of two edges is greater than the remaining edge. [Direction: You can consult any resources such as books, online references, and videosfor this assignment, however, you have to properly cite and paraphrase your answerswhen it is necessary.] solve it any how urgently please.NASM CODE, modify the code below Write an assembly program for the processor family x86-32 that reads three signed interger numbers from the standard input and writes the greatest of them on the console. Use the C functions scanf and printf for the management of data input and data output. section .datamsg db "The largest number is: %d", 0xa,0v1 equ -47v2 equ 32v3 equ 21num1 times 4 db 0num2 times 4 db 0num3 times 4 db 0 section .textextern printfglobal main ;must be declared for using gcc main: ;tell linker entry point mov dword [num1], v1mov dword [num2], v2mov dword [num3], v3 mov ecx, [num1]cmp ecx, [num2]jg check_third_nummov ecx, [num2]check_third_num: cmp ecx, [num3]jg _exitmov ecx, [num3]_exit:;Print the greatest numberpush ecxpush msgcall printf ;Exit process mov eax, 1int 80h
- For the following C statement, what is the corresponding MIPS assembly code? Assume that the variables f, g, h, i, and j are assigned to registers $s0, $s1, $s2, $s3, and $s4, respectively. Assume that the base address of the arrays (A and B) are in registers $s6 and $s7, respectively. Also, assume that A and B are arrays of words. B[f-j] = B[i] + A[g]Please look at the entire text below. Please solve and show all work. Thank you. What is the corresponding MIPS assembly code for the following C statement? Assume that the variables f, g, h, i, and j are assigned to register $s0, $s1, $s2, $s3, and $s4, respectively. Assume that the base address of the arrays A and B are in registers $s6 and $s7, respectively. B[8] = A[i−j] Translate the following C code to MIPS. Assume that the variables f, g, h, i, and j are assigned to register $s0, $s1, $s2, $s3, and $s4, respectively. Assume that the base address of the arrays A and B are in registers $s6 and $s7, respectively. Assume that the elements of the arrays A and B are 8-byte words: B[8] = A[i] + A[j] Assume that registers $s0 and $s1 hold the values 0x80000000 and 0xD0000000, respectively. What is the value of $t0 for the following assembly code? add $t0, $s0, $s1 Is the result in $t0 the desired result, or has there been an overflow? For the contents of registers $s0 and $s1 as…(Practice) a. Using Figure 2.14 and assuming the variable name rate is assigned to the byte at memory address 159, determine the addresses corresponding to each variable declared in the following statements. Also, fill in the correct number of bytes with the initialization data included in the declaration statements. (Use letters for the characters, not the computer codes that would actually be stored.) floatrate; charch1=M,ch2=E,ch3=L,ch4=T; doubletaxes; intnum,count=0; b. Repeat Exercise 9a, but substitute the actual byte patterns that a computer using the ASCII code would use to store characters in the variables ch1, ch2, ch3, and ch4. (Hint: Use Appendix B.)
- In C, both long x and int *y are 8-byte values. How can we can tell which one is which in the assembly compiled from the C? (I.e., what is true of one but not the other? If several answers seem correct, pick the most precise option.) A. x is stored in a register, y in memory B. x is modified using addq, y using addl C. x may be an argument to add but y won't be D. When an argument of mov, a register storing x will never be inside parentheses E. When an argument of mov, a register storing y will always be inside parenthesesWhat is the corresponding MIPS assembly code for the following C statement? Assume that the variables f, g, h, i, and j are assigned to registers $s0, $s1, $s2, $s3, and $s4, respectively. Assume that the base address of the arrays A and B are in registers $s6 and $s7, respectively. Assume that the elements of the arrays A and B are 4-byte words: f = g + (h − 5); B[8] = A[i] + A[j+1];Modify the code below: Add code to display both sum and diff in a hexadecimal format on the screen, all bytes must be stored in a reversed sequence order. code: .386 ; Tells MASM to use Intel 80386 instruction set..MODEL FLAT ; Flat memory modeloption casemap:none ; Treat labels as case-sensitive INCLUDE IO.H ; header file for input/output .STACK 100h ; (default is 1-kilobyte stack) .const ; Constant data segment .DATA ; Begin initialized data segment op1 QWORD 0A2B2A40675981234h ; first 64-bit operand for additionop2 QWORD 08010870001234502h ; second 64-bit operand for addition sum DWORD 3 dup(?) ; 96-bit sum = ????????????????????????h op3 DWORD 2h, 0h, 0h ; 96-bit operand to subtract: 20000000200000002h .CODE ; Begin code segment_main PROC ; Beginning of code;-----------------------------------------------------------------------------; add two 64 bit numbers and store the result as 96 bit sum;-----------------------------------------------------------------------------mov EAX,…
- What will be the contents of AX, BX, CX and DX registers after the execution of the following program? MOV DX, 1234 MOV CL, 0F MOV BH, AB MOV AX, 6589 ADD DX, AX MOV AH, 12 Lab1: OR AH, CL MOV DL, 41 MOV BX, F0 MOV CL, 3A LOOP Lab1 INC BX SHR BX,2Please solve and show all work. For the following C statement, what is the corresponding MIPS assembly code? Assume that the variables f, g, h, i, and j are assigned to registers $s0, $s1, $s2, $s3, and $s4, respectively. Assume that the base address of the arrays A and B are in registers $s6 and $s7, respectively. Assume that the elements of the arrays A and B are 8-byte words: f = (g+i+2) + (h − 8); B[8] = A[i-9] + A[j+8] + 7;Q2. Refer to datapath design on slide no. 26 with added blocks for jump instructions as shown inslide 33 in Chapter 4 (part 1). Let’s assume a program has 500 instructions. These instructions aredistributed as follows:R-Type Immediatearithmetic(addi)Load Store Branch Jump25% 5% 20% 20% 10% 20%Answer the following questions (show calculations):a) How many instructions will use instruction memory?b) How many instructions will use data memory?c) How many instructions will use the sign extend block?d) In the clock cycles, where the sign extend block is not required, does it remain idle? If yes,how? If not, what happens to the output of the block in that cycle? chapter 4, slide 33 is added as an image needed to solve the question