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Hyper Threading Technology

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HYPER-THREADING TECHNOLOGY

1. INTRODUCTION

This report describes the Hyper-Threading Technology architecture, and discusses the microarchitecture details of Intel's first implementation on the Intel Xeon processor family. For that reason, firstly, general processor microarchitecture and thread level parallelism will be explained. After that, hyper-threading technology architecture will be discussed in a detailed manner. Then, first implementation examples will be given. Also, some important components will be presented required for a hyper-threaded processor. After all, performace results of this new technology will conclude the report.

Hyper-Threading Technology brings the concept of simultaneous multi-threading to a general …show more content…

Multiprocessor systems have been used for many years, and high-end programmers are familiar with the techniques to exploit multiprocessors for higher performance levels.

In recent years a number of other techniques to further exploit TLP have been discussed and some products have been announced. One of these techniques is chip multiprocessing (CMP), where two processors are put on a single die. The two processors each have a full set of execution and architectural resources. The processors may or may not share a large on-chip cache. CMP is largely orthogonal to conventional multiprocessor systems, as you can have multiple CMP processors in a multiprocessor configuration. Recently announced processors incorporate two processors on each die. However, a CMP chip is significantly larger than the size of a single-core chip and therefore more expensive to manufacture; moreover, it does not begin to address the die size and power considerations.

Another approach is to allow a single processor to execute multiple threads by switching between them. Time-slice multithreading is where the processor switches between software threads after a fixed time period. Time-slice multithreading can result in wasted execution slots but can effectively minimize the effects of long latencies to

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