1. For the Intel 8086 microprocessor interface diagram below chose the suitableICs to be connected in the three blocks, write the selected IC Name in eachblock. Draw the generated read and write control signals+Vcc8282 8-bit latchDigDI₁20₂¹DiDIADisD720 VCC15 000180011700₂1600₂15 DO140051300OlyJE12 007GND 10 11 STBс08282YOY1AY2B 74LS138 Y3JaGIWNI83-8 Decoder Y4Y5Y67Y7G2A G2B G199CLKREADYRESET222222220A2A1An11MN/MX8086 CPU10GND8286 8-bit transceiverA1g-A16AD15-ADO& & E1911,1H-178. 16B, 15ALEBHE070-008205 00-3-8 DEC040-DENDT/RHOLDHLDAINTRINTA00-020-010-O 0MIOWRRDDIRSTB74LS245 8bitBidirectional bufferX110X2DE8284AClockGeneratorGND₁18B₂ 17B 161514By 1211IDD2D3D4DSD6D7D8D74LS373 8bit latchCLKBHEAddressBusGOCEnable outputcontrol1020304050DataBus607030

1. For the Intel 8086 microprocessor interface diagram below chose the suitable ICs to be connected in the three blocks, write the selected IC Name in each block. Draw the generated read and write control signals +Vcc 8282 8-bit latch 04 Vcc ₁2 18 00₂ 03 1800, Di 1700₂ . 7 HOH ORY 5. GNO 10 16 DO₂ DO 15 14 100% 13 00% 12 007 STB YO Y1 Y2 B 74LS138 Y3 3-8 Decoder Y4 Y5 Y6 Y7 G2A G2B G1 i P CLK READY RESET 8086 CPU 10 GND MN/MX 8205 3-8 DEC G&G A1 A16 AD15-ADO ALE BHE Oro O 0:0 00 00 0:0 0₁0 00 DEN DT/R MIO WR 8286 8-bit transceiver 74LS245 8bit RD HOLD HLDA INTR INTA STB X1 Bidirectional buffer 19 GND X₂ 1841₁ 8284A Clock Generator P. 18 16 715 94 IDD Q CLK 74LS373 8bit latch 2D 3D 4D SD 6D 7D SD BHE Address Bus 10 20 30 40 50 Enable output control Data Bus 60

1. For the Intel 8086 microprocessor interface diagram below chose the suitable ICs to be connected in the three blocks, write the selected IC Name in each block. Draw the generated read and write control signals +Vcc 8282 8-bit latch 04 Vcc ₁2 18 00₂ 03 1800, Di 1700₂ . 7 HOH ORY 5. GNO 10 16 DO₂ DO 15 14 100% 13 00% 12 007 STB YO Y1 Y2 B 74LS138 Y3 3-8 Decoder Y4 Y5 Y6 Y7 G2A G2B G1 i P CLK READY RESET 8086 CPU 10 GND MN/MX 8205 3-8 DEC G&G A1 A16 AD15-ADO ALE BHE Oro O 0:0 00 00 0:0 0₁0 00 DEN DT/R MIO WR 8286 8-bit transceiver 74LS245 8bit RD HOLD HLDA INTR INTA STB X1 Bidirectional buffer 19 GND X₂ 1841₁ 8284A Clock Generator P. 18 16 715 94 IDD Q CLK 74LS373 8bit latch 2D 3D 4D SD 6D 7D SD BHE Address Bus 10 20 30 40 50 Enable output control Data Bus 60

Electric Motor Control

10th Edition

ISBN:9781133702818

Author:Herman

Publisher:Herman

Chapter22: Sequence Control

Section: Chapter Questions

Problem 6SQ: Draw a symbol for a solid-state logic element AND.

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