15. Simplify the circuit in Figure 5-57 as much as possible, and verify that the simplifted circuit isequivalent to the original by showing that the truth tables are identical16. Repeat Problem 15 for the circuit in Figure 5.38.FIGURE 5-6717. Minimize the gates required to implement the functions in each part of Problem 11 in SOP form.18. Minimize the gates required to implement the functions in each part of Problem 12 in SOPform.19. Minimize the gates required to implement the function of the circuit in each part of Figure5-56 in SOP form.Section 5-3 The Universal Property of NAND and NOR Gates20. Implement the logic circults in Figure 5-54 using only NAND gales.21. Implement the logic circult in Figure 5-58 using only NAND gales.22. Repeat Problem 20 using only NOR gales23. Repeat Problem 21 using only NOR gales.Section 5-4 Combinational Logic Using NAND and NOR Gates24. Show how the following expressions can be implemented as stated using only NOR gates:b) X-XIC(a) X-ARC(c) X-A+B(e) X-AR+CDX(A+RC+D)2+8+v-x@p)(X-AMCODE+AR) + CHFIGURE 5-5625. Repeat Problem 24 using only NAND gales26. Implement each function in Problem 10 by using only NAND gates.27. Implement each function in Problem 11 by using only NAND gales.Section 5-5 Pulse Waveform Operation28. The output of the logic circult and input waveforms in Figure 5-59 is passed through anInverter. Draw the output waveform.Annrwrrrrrr.FIGURE 5-6929. For the logic circul in Figure 5-60, draw the output waveform in proper relationship to theInputs.FIGURE 5-60 30. For the input waveforms in Figure 5-61, what logic circull will generate the output waveformshown?AСOutput XFIGURE 5-6131. Repeat Problem 30 for the waveforms in Figure 5-62BCInputs BOutput IFIGURE 5-6232. For the circuit in Hgare 5-63, draw the waveforms at the numbered points in the proper relaBorship to each other.FIGURE 5-6333. Assuming a propagation delay through each gate of 10 ranoseconds (ns), determine if thedesired output waveform X in Figure 5-64 (a pulse with a minimum -25 as positioned asshown) will be generated properly with the given inputs.100 pulse with25mminimamСDEG₁₂₁G₂FIGURE 5-64Section 5-6 Combinational Logic with VHDL34. Describe a 2-input NAND gale with VHDL35. Describe a 3-input AND gale with VHDL.36. Wille a VHDL program using the data flow approach (Hoolean expressions) to describe thelogic circuit in Figure 5-54(b).37. Wirile VHX. programs using the data flow approach (Boolean expressions) for the logiccircuits in Rigure 5-55(e) and (C₂G₂₁₂X.

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15. Simply the circalt in Rigare 5-57 as much as possible, and verify that the simplifted circuit is equivalent to the original by showing that the inith tables are identical