6. Implement the hardware that perform the following tasks 1) transfer/Load numbers 5 and 4 into R1 and R2 respectively 2) Adding R1 to R2 3) transfer/Load the result into R3 4) Store R3 into RAM
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- Assume the following values are stored at the indicated memory addresses and registers Address Value 0x100 0xaaa 0x104 0x123 0x108 0x12 0x10c 0x10 Register Value %eax 0x100 %ecx 0x1 %edx 0x3 Fill up the following table: %eax 0x104 $0x108 (%eax) 4(%eax) 9(%eax,%edx) 260(%ecx,%edx) 0xFC(,%ecx,4) (%eax,%edx,4)Convert given code to LEGv8 code:int f, g, y //global 64-bit variablesint sum (int a, int b) { // at memory address X0+1000.return (a +b)} int main (void) // at memory address X0 + 800{f=2;g=3;y= sum (f, g);return y;}Convert this code, making valid assumptions about registers and register use. Notethat brackets and global variable declarations are not affecting the addresses of the instructionsin memory.6. Assume that two numbers: dividend and divisor are saved in memory address M1 and M2 respectively. Quotient and remainder should be saved in R1 and R2 respectively. Write assembly language instructions and then list microoperations for each instruction and list the control signals required to be activated for each microoperation. MBR is used as buffer for any register to register transfer operation. Signal Description: Control signals operation Comments C0 MAR to RAM (through address bus) C1 PC to MBR C2 PC to MAR C3 MBR to PC C4 MBR to IR C5 RAM to MBR C6 MBR to ALU C7 Accumulator to ALU C8 IR to MAR C9 ALU to Accumulator C10 MBR to Accumulator C11 Accumulator to MBR C12 MBR to RAM (through data bus) C13 IR to Control Unit C14 MBR to R1 C15 MBR to R2 C16 MBR to R3 C17 MBR to R4…
- Please look at the entire text below. Please solve and show all work. Thank you. What is the corresponding MIPS assembly code for the following C statement? Assume that the variables f, g, h, i, and j are assigned to register $s0, $s1, $s2, $s3, and $s4, respectively. Assume that the base address of the arrays A and B are in registers $s6 and $s7, respectively. B[8] = A[i−j] Translate the following C code to MIPS. Assume that the variables f, g, h, i, and j are assigned to register $s0, $s1, $s2, $s3, and $s4, respectively. Assume that the base address of the arrays A and B are in registers $s6 and $s7, respectively. Assume that the elements of the arrays A and B are 8-byte words: B[8] = A[i] + A[j] Assume that registers $s0 and $s1 hold the values 0x80000000 and 0xD0000000, respectively. What is the value of $t0 for the following assembly code? add $t0, $s0, $s1 Is the result in $t0 the desired result, or has there been an overflow? For the contents of registers $s0 and $s1 as…3. For the following C statement, write the corresponding MIPS assembly code. Assume that the variables f, g, h, i, and j are assigned to registers $s0, $s1, $s2, $s3, and $s4, respectively. Assume that the base address of the arrays A and B are in registers $s6 and $s7, respectively. B[i-j] = A[8]; 4.Translate the following C code to MIPS. Assume that the variables, f,g. h, i, and j are assigned to registers $s0, $s1, $s2, $s3, $s4, and $s4, respectively. Assume that the base address of A and B are in registers $s6 and $s7, respectively. Assume that the elements of the arrays A and B are 8-byte words: B[8] = A[i] + A[j]; 5.For the MIPS assembly instructions below, what is the corresponding C statement? Assume that the variables f, g, h, i, and j are assigned to registers $s0, $s1, $s2, $s3, and $s4, respectively. Assume that the base address of the arrays A and B are in registers $s6 and $s7, respectively. You must add line comments to ALL uncommented 4 lines. sll $t0, $s0, 2 #…For the following C statement, what is the corresponding MIPS assembly code? Assume that the variables f, g, h, i, and j are assigned to registers $s0, $s1, $s2, $s3, and $s4, respectively. Assume that the base address of the arrays (A and B) are in registers $s6 and $s7, respectively. Also, assume that A and B are arrays of words. B[f-j] = B[i] + A[g]
- Write programs in three-address, two-address and one-address architectures that can calculate the function A=(B-C) * (D-E). Assume 8-bit operation codes, 16-bit addresses and operands, and data transfers to and from memory carried out in 16-bit arrays. Assume also that the operation code must be transferred from memory by itself. The code must not overwrite any of the operands. As many temporary registers as necessary may be used.Rearrange the following code to minimize the total number of cycles, assuming that a dependent instruction following the load will need two clock cycles of delay before getting the data. Load r1, 64 (r2)Add r2, r2, r2Sub r3, r4, r1Load r4, 32 (r4)Please solve and show all work. For the following C statement, what is the corresponding MIPS assembly code? Assume that the variables f, g, h, i, and j are assigned to registers $s0, $s1, $s2, $s3, and $s4, respectively. Assume that the base address of the arrays A and B are in registers $s6 and $s7, respectively. Assume that the elements of the arrays A and B are 8-byte words: f = (g+i+2) + (h − 8); B[8] = A[i-9] + A[j+8] + 7;
- Translate the following C code to MIPS. Assume that the variables i and j are assigned to registers $s0 and $s1, respectively. Assume that the base address of the arrays A and B are in registers $s6 and $s7, respectively. Assume that the elements of the arrays A and B are 4-byte words. If you need to use registers $t0 through $t9 or $s0 through $s7, use the lower-numbered registers first. where (i < j ){ B[ i ] = A [ i + 1 ] + A [ i ]; i++; }Q1: Suppose the hypothetical processor has two I/O instructions: (3+3+3)0011=Load AC from I/O0111=Store AC to I/OIn this case, the 12-bit address identifies a particular external device. Show the program execution using figure for the following program:a) Load AC from device 6b) Add contents of memory location 880c) Store AC to device 7 (Note: Question is to be solved similar to the pictures attached with minimum explaination of a line or two with the steps and SHOULD include the memory location 880 as stated in the question)Translate the following LEGv8 code to C. Assume that the variables f, g, h, i, and j are assigned to registers X0, X1, X2, X3, and X4, respectively. Assume that the base address of the arrays A and B are in registers X6 and X7, respectively. ADDI X9, X6, #8 ADD X10, X6, XZR STUR X10, [X9, #0] LDUR X9, [X9, #0] ADD X0, X9, X10