A cache designer wishes to enhance the size of a 4 KiB physically labeled, virtually indexed cache. Is it feasible to create a 16 KiB direct-mapped cache with the page size mentioned above, assuming two words per block? How would the designer expand the cache's data size?

A cache designer wishes to enhance the size of a 4 KiB physically labeled, virtually indexed cache. Is it feasible to create a 16 KiB direct-mapped cache with the page size mentioned above, assuming two words per block? How would the designer expand the cache's data size?

Systems Architecture

7th Edition

ISBN:9781305080195

Author:Stephen D. Burd

Publisher:Stephen D. Burd

Chapter6: System Integration And Performance

Section: Chapter Questions

Problem 6VE

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