(a) Using register transfer notation, specify the first two steps of execution that are common to all RISC-style instructions on the basic Chapter 5 datapath. 1. 2. (e) For the basic processing unit, assume that signals T1 to 75 are asserted during the corresponding execution time step. Assume that signals Load, Store, ALU, Call, Return, Branch are asserted based on the instruction being executed. Write logic expressions for the control signals that are given below. IR_en = MEM_write = (b) Using register transfer notation, specify the details for the remaining steps of execution after common steps in part (a) for the instruction: Load Rt, X(Rs) 3. 4. 5. (f) The register file has two 32-bit data outputs. Briefly identify all reg. file inputs. (c) Using register transfer notation, specify the details for the remaining steps of execution for the instruction: Multiply Rd, Rs, Rt. (g) Briefly identify the data inputs to the multiplexer that is labelled as MuxY. 3. 4. 5. (d) Using register transfer notation, specify the details for the remaining steps of execution for the instruction: Return. (h) Assume that reg. R4 has 0x8765 and reg. R3 has 0x4321. Consider the instruction: Subtract R5, R4, R3. Complete the table for execution of this instruction, reflecting contents of the internal registers RA, RB, RZ, and RY. Final contents of reg. R5 = Cycle RA RB RZ RY 3. 4. 5. 2 3 4 5

Database System Concepts
7th Edition
ISBN:9780078022159
Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Chapter1: Introduction
Section: Chapter Questions
Problem 1PE
icon
Related questions
Question
(a) Using register transfer notation, specify the first two steps of execution that
are common to all RISC-style instructions on the basic Chapter 5 datapath.
1.
2.
(e) For the basic processing unit, assume that signals T1 to 75 are asserted
during the corresponding execution time step. Assume that signals Load,
Store, ALU, Call, Return, Branch are asserted based on the instruction being
executed. Write logic expressions for the control signals that are given below.
IR_en =
MEM_write =
(b) Using register transfer notation, specify the details for the remaining steps of
execution after common steps in part (a) for the instruction: Load Rt, X(Rs)
3.
4.
5.
(f) The register file has two 32-bit data outputs. Briefly identify all reg. file inputs.
(c) Using register transfer notation, specify the details for the remaining steps of
execution for the instruction: Multiply Rd, Rs, Rt.
(g) Briefly identify the data inputs to the multiplexer that is labelled as MuxY.
3.
4.
5.
(d) Using register transfer notation, specify the details for the remaining steps of
execution for the instruction: Return.
(h) Assume that reg. R4 has 0x8765 and reg. R3 has 0x4321. Consider the
instruction: Subtract R5, R4, R3. Complete the table for execution of this
instruction, reflecting contents of the internal registers RA, RB, RZ, and RY.
Final contents of reg. R5 =
Cycle
RA
RB
RZ
RY
3.
4.
5.
2
3
4
5
Transcribed Image Text:(a) Using register transfer notation, specify the first two steps of execution that are common to all RISC-style instructions on the basic Chapter 5 datapath. 1. 2. (e) For the basic processing unit, assume that signals T1 to 75 are asserted during the corresponding execution time step. Assume that signals Load, Store, ALU, Call, Return, Branch are asserted based on the instruction being executed. Write logic expressions for the control signals that are given below. IR_en = MEM_write = (b) Using register transfer notation, specify the details for the remaining steps of execution after common steps in part (a) for the instruction: Load Rt, X(Rs) 3. 4. 5. (f) The register file has two 32-bit data outputs. Briefly identify all reg. file inputs. (c) Using register transfer notation, specify the details for the remaining steps of execution for the instruction: Multiply Rd, Rs, Rt. (g) Briefly identify the data inputs to the multiplexer that is labelled as MuxY. 3. 4. 5. (d) Using register transfer notation, specify the details for the remaining steps of execution for the instruction: Return. (h) Assume that reg. R4 has 0x8765 and reg. R3 has 0x4321. Consider the instruction: Subtract R5, R4, R3. Complete the table for execution of this instruction, reflecting contents of the internal registers RA, RB, RZ, and RY. Final contents of reg. R5 = Cycle RA RB RZ RY 3. 4. 5. 2 3 4 5
Expert Solution
steps

Step by step

Solved in 2 steps

Blurred answer
Similar questions
  • SEE MORE QUESTIONS
Recommended textbooks for you
Database System Concepts
Database System Concepts
Computer Science
ISBN:
9780078022159
Author:
Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Publisher:
McGraw-Hill Education
Starting Out with Python (4th Edition)
Starting Out with Python (4th Edition)
Computer Science
ISBN:
9780134444321
Author:
Tony Gaddis
Publisher:
PEARSON
Digital Fundamentals (11th Edition)
Digital Fundamentals (11th Edition)
Computer Science
ISBN:
9780132737968
Author:
Thomas L. Floyd
Publisher:
PEARSON
C How to Program (8th Edition)
C How to Program (8th Edition)
Computer Science
ISBN:
9780133976892
Author:
Paul J. Deitel, Harvey Deitel
Publisher:
PEARSON
Database Systems: Design, Implementation, & Manag…
Database Systems: Design, Implementation, & Manag…
Computer Science
ISBN:
9781337627900
Author:
Carlos Coronel, Steven Morris
Publisher:
Cengage Learning
Programmable Logic Controllers
Programmable Logic Controllers
Computer Science
ISBN:
9780073373843
Author:
Frank D. Petruzella
Publisher:
McGraw-Hill Education