For the assembly language instructions shown below, the initial value of r2 = Ox0000_0012 and r3 = 0x0000_0034. Show the contents of r2 and r3 after the instructions execute. Explain which conditional instructions execute or do not execute and why. CMP R3,#-1 MOVGT r2,#0XBE ADDEQ r3,r3,r2
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- Processor R is a 64-bit RISC processor with a 2 GHz clock rate. The average instruction requires one cycle to complete, assuming zero wait state memory accesses. Processor C is a CISC processor with a 1.8 GHz clock rate. The average simple instruction requires one cycle to complete, assuming zero wait state memory accesses. The average complex instruction requires two cycles to complete, assuming zero wait state memory accesses. Processor R can’t directly implement the complex processing instructions of Processor C. Executing an equivalent set of simple instructions requires an average of three cycles to complete, assuming zero wait state memory accesses. Program S contains nothing but simple instructions. Program C executes 70% simple instructions and 30% complex instructions. Which processor will execute program S more quickly? Which processor will execute program C more quickly? At what percentage of complex instructions will the performance of the two processors be equal?For the assembly language instructionsshown below, the initial value of r2 =Ox0000_0012 and r3 = 0x0000_0034. Show the contents of r2 and r3 after theinstructions execute. Explain whichconditional instructions execute or do notexecute and why. CMP R3,#-1MOVGT r2,#OxBEADDEQ r3,r3,r214. Consider the following assembly language instructions:mov al, 15mov ah, 15xor al, almov cl, 3shr ax, cladd al, 90Hadc ah, 0What is the value in ax register after execution of above instructions? a. 0270H b. 0170H c. 01E0H d. 0370H
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- It's possible to write compilers and assemblers that rearrange assembly language instructions such that a pipeline has as few dangers as possible. Do all assemblers and compilers rearrange assembly language instructions in the same manner to achieve maximum efficiency?Write an assembly language programme that can perform the following tasks:A. Move the value X in the AX register, whereas X is 14B. Separate the digits of value stored in AX register and place into BL, BH and CL registers respectively.For all the questions in this assignment, you should use conditional execution of branch instructions only (i.e., do not use conditional execution of data processing instruction or other non-branch instructions). Question #1 . For each of the following C++-like pseudo code segments, write equivalent ARM assembly language instructions. if (r1 >= 10) { r2 = r2 - r1; } r2 = r2 + 60; if (r4 < 0) r4 = r4 + 100; else r4 = 100 - r4; if (r5 == r6) r5 = r5 + 80; else if (r5 < r6) r5 = r5 - 40; else if (r5 != r8) r5 = -r5; else r5 = 9*r5;
- Compilers and assemblers may be designed to sequence assembly language instructions in such a manner that a pipeline has the fewest potential dangers. Do all assemblers and compilers rearrange assembly language instructions in the same manner to achieve maximum efficiency?The following MIPS instructions appear in an assembly language program, in the order shown: add $t4,$t1,$t3 add $t5,$t1,$t3 What data hazard prevents a multiple-issue processor from executing these instructions simultaneously? A)RAW B)WAR C)WAW D)No data hazard existsGiven the following state of memory (in hexadecimal), answer the following questions for the instructions given in Pep/9 assembly language. Memory Address: Memory Contents: 00F1 4A00F2 D1 00F3 29 00F4 C6a. What are the contents of the A register in binary after the execution of the instructions:LDBA 0x00F1, i ADDA 0x00F2, db. What are the contents of the A register in binary after the execution of the instructions:LDWA 0x00F3, d ADDA 0x0104, i