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- Suppose the user process' size is 8192Kb and is a standard hard disk where swapping has a data transfer rate of 1Mbps. Calculate for the total swap time in milliseconds (swap-in time and swap-out time) of the 8192Kb process to and from the physical memory.Consider a disk drive specifications. with the following 16 surfaces, 512 tracks/surface, 512 sectors/ track, 1 KB/sector, rotation speed 3000 rpm. The disk is operated in cycle stealing mode whereby whenever one byte word is ready it is sent to memory; similarly, for writing, the disk interface reads a 4 byte word from the memory in each DMA cycle. Memory cycle time is 40 nsec. The maximum percentage of time that the CPU gets blocked during DMA operation?Suppose that a disk drive rotates at 8000 RPM. It has an average seek time of 4 milliseconds. If its transfer rate is 15 Mbps, determine the average time it takes for a 15K byte request to be transferred from the time the disk starts the seek? From this, determine its throughput.
- Suppose that a magnetic disk has an average seek time of 4 ms, a rotation rate of 5400 RPM, a transfer rate of 50 MB/second, a sector size of 512 bytes, and controller overhead of 2 ms. What is the average amount of time to read a single sector?Suppose we have a computer with the following characteristics: the magnetic disk has an accesslatency of 15 milliseconds and a streaming transfer rate of 5 megabytes per second. For the disk described,what is the effective transfer rate if an average access is followed by a streaming transfer ofa. 1024 bytesA computer system has a memory access time of 120 ns. The hit rate is 96% and memory and cache accesses don' t lap and affect each other. In order AMAT to be under 12 ns, what should the maximum cache access time be?
- A memory management system uses TLB (Translation lookaside buffer) to enhance memory access time. If time to access a TLB is x nanoseconds and time to access main memory is y nanoseconds (y >>x), determine effective memory access time when TLB hit ratio is p ( 0 < p <1)? Also, determine the effective memory access time when x = 1 nanosec, y=20 nanosec, and p = 0.7.A computer system has a memory access time of 11.0 ns and is using a SATA III SSD (solid state drive) capable of transferring 8 Gbit/s. The size of a page is 1024 bytes. What should the probability of a page fault be so that access time degradation does not exceed 14%?A computer has instructions that require two bus cycles, one to fetch the instruction and one to fetch the data. Each bus cycle takes 250 nanoseconds and each instruction takes 500 nanoseconds (i.e., the internal processing time is negligible). The computer also has a disk with 16,512 byte sectors per track. Disk rotation time is 8.092 milliseconds. To what percentage of its normal speed is the computer reduced during DMA transfer if each DMA takes one bus cycle? Consider two cases: 8-bit bus transfer and 16-bit bus transfer.
- A manufacture wishes to design a hard disk with a capacity of 60 GB or more (using thestandard definition of 1GB = 230 bytes). If the technology used to manufacture thedisks allows 512-bytes sectors, 1024 sector/track, and 60% tracks/ platter, how manyplatters are required?Consider a memory system with a cache access time of 100ns and a memory access timeof 1200ns. If the effective access time is 10% greater than the cache access time, what is thehit ratio H?Your friend has just bought a new personal computer. She tells you that her new system runs at 1GHz, which makes it over three times faster than her old 300 MHz system. What would you tell her? By using a specific example case (e.g., In a given system, for 40% of its time the processor is busy with computation but for 60% of its time processor is idle waiting for the completion of I/O operations in disk and network devices), explain how Amdahl’s law can be applied