Part 1: Design a 4-bit synchronous counter that counts in 2,4,2,1 code. The counter shall count all BCD Even numbers in the 2,4,2,1 code. Use the minimum number of clocked JK flip flops and any necessary logic gates to build this counter. Note: treating the unused state don't care conditions.
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- Implement a 4-bit synchronous up counter with positive edge triggered D flip flops by doing thefollowing. Up counter means counting from 0000, 0001, 0010, ... to 1111, then 0000, 0001, ....1) Derive a state table for this counter with D flip flop.2) Develop state input equations.3) Sketch a logic diagram for this counteDesign a three bit synchronous binary counter that counts two by two with T-flipflops,continously. Output should be one when the counter equals maximum number.a. Draw the exitation table b. Draw the corresponding state diagram. c. Tabulate the state table for the sequential circuit. d. Draw the logic diagram of the circuit.You are asked to design a synchronous counter that will count the sequence 1 > 2>3>1. (a) Represent these decimal numbers in 2 bits binary numbers. (b) Write down the state table. (c) Find the functions for the next state of the state table using K-map. (d) Draw the circuit (You need to consider D flip-flops as memory unit).
- Design 2 bits counter that count down by using T flip flop when input x =1 and counts upwhen x=0. Find the following1. Derive the state table2. Derive the K‐map simplifications.3. Draw the logic diagramDraw a logic diagram of a 4-bit shift register, using D flip-flops, with mode selection inputsS1, S2 to operate according to the following function table: (Please provide actual diagram of the flip-flop circuit)Use Digital Logic Simulator Fill-in the blank boxes with the correct LOGIC GATE/ Full/Half Adder
- AND OPERATION 1. In your own words, what is a logic circuit? 2. What is the largest number of inputs which a single TTL IC can have constructed from the AND gates in the 7411 IC?In a home security system, the main door (O) of home is controlled by a logic operation with the help of RFID card. the Owner, Mrs. Owner, Security Guard and Guest have a designated RFID card - Owner with card W, Mrs. Owner with card X, security guard with card Y and guest with card Z. Whenever, any of the card is NOT inserted, Door remains Closed; when, all the cards are inserted together, the Door is opened. Consider, card NOT inserted as Logic Low (0), card inserted as High Logic (1), door open as Low Logic (0) and door close means High Logic (1).(i) Identify the logic based on the problem statement(ii) Develop the truth table (W, X, Y & Z – inputs, O – output)(iii) Find the Standard SOP and Standard POS expression(iv) Find the Simplified SOP expression using KMAP.(v) Design the system using basic logic gate.How would I complete the truth tables for these logic gates? How do I know whether the transistor is closed (c) or open (o) for each '1' or '0' as listed for F outputs?
- Given the logic function: F(A,B,C,D) = Σm(0,4,5,10,11,13,14,15) a. Find a minimum circuit which implements F using AND and OR gates. Identify two 1-hazards in the circuit. b. find another minimum circuit which implements F using AND and OR gates. Identify two 0-hazards in the circuit. c. Find an AND-OR circuit for F which has no hazards.We want to design a circuit to detect prime numbers.The input of the circuit is a 4-bit binary number and the output is a single bit and should show one when the number is prime and zero otherwise.B. Implement the circuit using a 4× 1 multiplexer and combinational logic gates.C. Implement the circuit using only one decoder and one OR gate. What is the size of the decoder you use?Consider two binary numbers where the first is made of three bits whichcan be represented by X, Y, and Z, while the second is two bits and isrepresented by A and B. Design a logic circuit that multiplies X Y Z timesA B, using two half adders, one full adder in addition to AND gates.