Perform the following additions, assuming 6-bit two's complement binary representation. Show the effect on the status bits (NZVC). Example: ex) 101000 +100000 001000 NZVC 0011 Result was 1001000 but the 1 is carry-out (C-1). Negative + Negative should be Negative but positive so overflow (V-1) a) NZVC b) NZVC c) NZVC d) 011011 + 100101 101101 +000101 NZVC 110000 + 101011 010000 + 001011

Perform the following additions, assuming 6-bit two's complement binary representation. Show the effect on the status bits (NZVC). Example: ex) 101000 +100000 001000 NZVC 0011 Result was 1001000 but the 1 is carry-out (C-1). Negative + Negative should be Negative but positive so overflow (V-1) a) NZVC b) NZVC c) NZVC d) 011011 + 100101 101101 +000101 NZVC 110000 + 101011 010000 + 001011

Systems Architecture

7th Edition

ISBN:9781305080195

Author:Stephen D. Burd

Publisher:Stephen D. Burd

Chapter4: Processor Technology And Architecture

Section: Chapter Questions

Problem 7VE

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