Let us consider a computer executing the following mix of instructions: Instruction ALU LOAD STORE BRANCH JUMP Frequency (IC) Clock cycles (CPI) 50% 3 20% 6 10% 6 10% 4 10% 4 a. How much is the CPI average? b. How much is the Throughput expressed in MIPS, assuming a clock frequency of 2 GHz? Let us assume that, given a hardware optimization technique, 40% of instructions of the program a executed with CPI2 = 2.05 and the remaining fraction of instructions (60%) is executed with the san CPI calculated in the case (a). c. How much is the overall Speedup due to CPI enhancement? d. How much is the new Throughput expressed in MIPS?

Computer Networking: A Top-Down Approach (7th Edition)
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Author:James Kurose, Keith Ross
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Chapter1: Computer Networks And The Internet
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Question 3:
Let us consider a computer executing the following mix of
Frequency (IC)
50%
20%
10%
10%
10%
Instruction
ALU
LOAD
STORE
BRANCH
JUMP
instructions:
Clock cycles (CPI)
3
6
6
4
4
a. How much is the CPI average?
b. How much is the Throughput expressed in MIPS, assuming a clock frequency of 2 GHz?
Let us assume that, given a hardware optimization technique, 40% of instructions of the program are
executed with CPI2 = 2.05 and the remaining fraction of instructions (60%) is executed with the same
CPI calculated in the case (a).
c. How much is the overall Speedup due to CPI enhancement?
d. How much is the new Throughput expressed in MIPS?
Transcribed Image Text:Question 3: Let us consider a computer executing the following mix of Frequency (IC) 50% 20% 10% 10% 10% Instruction ALU LOAD STORE BRANCH JUMP instructions: Clock cycles (CPI) 3 6 6 4 4 a. How much is the CPI average? b. How much is the Throughput expressed in MIPS, assuming a clock frequency of 2 GHz? Let us assume that, given a hardware optimization technique, 40% of instructions of the program are executed with CPI2 = 2.05 and the remaining fraction of instructions (60%) is executed with the same CPI calculated in the case (a). c. How much is the overall Speedup due to CPI enhancement? d. How much is the new Throughput expressed in MIPS?
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