Suppose that a 64M x 16 main memory is built using 512K × 8 RAM chips and memory is word-addressable. a) How many RAM chips are necessary? b) If we were accessing one full word, how many chips would be involved? c) How many address bits are needed for each RAM chip? d) How many banks will this memory have? e) How many address bits are needed for all of memory? f) If high-order interleaving is used, where would address 32(base 10) be located? (Your answer should be "Bank#, Offset#") g) Repeat (f) for low-order interleaving.
Suppose that a 64M x 16 main memory is built using 512K × 8 RAM chips and memory is word-addressable.
a) How many RAM chips are necessary?
b) If we were accessing one full word, how many chips would be involved?
c) How many address bits are needed for each RAM chip?
d) How many banks will this memory have?
e) How many address bits are needed for all of memory?
f) If high-order interleaving is used, where would address 32(base 10) be located? (Your answer should be "Bank#, Offset#")
g) Repeat (f) for low-order interleaving.
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Suppose that a 4M × 32 main memory is built using 128K × 8 RAM chips and memory is
word addressable (word size = 32 bits)
a. How many RAM chips are needed?
b. How many chips would be involved when accessing a full word?
c. How many banks will this memory have?
d. How many address bits are needed for the whole main memory?
e. If high-order interleaving is used, where would the address 7060016 be located (in which
bank)?
f. If low-order interleaving is used, where would the address 2C77D516 be located?
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